參數(shù)資料
型號: MB91F133PMT2
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 33 MHz, RISC MICROCONTROLLER, PQFP144
封裝: PLASTIC, LQFP-144
文件頁數(shù): 11/123頁
文件大?。?/td> 1331K
代理商: MB91F133PMT2
MB91133/MB91F133
108
4.
Detailed Description of Instructions
Add/subtract operation instructions (10 instructions)
Compare operation instructions (3 instructions)
Logical operation instructions (12 instructions)
Mnemonic
Type
OP
Cycle N Z V C
Operation
Remarks
ADD
Rj, Ri
* ADD
#s5, Ri
ADD
#i4, Ri
ADD2
#i4, Ri
A
C’
C
A6
A4
A5
1
CCCC
Ri + Rj
→ Ri
Ri + s5
→ Ri
Ri + extu (i4)
→ Ri
Ri + extu (i4)
→ Ri
MSB is interpreted as
a sign in assembly
language
Zero-extension
Sign-extension
ADDC
Rj, Ri
A
A7
1
CCCC Ri + Rj + c
→ Ri
Add operation with
sign
ADDN
Rj, Ri
* ADDN
#s5, Ri
ADDN
#i4, Ri
ADDN2
#i4, Ri
A
C’
C
A2
A0
A1
1
––––
Ri + Rj
→ Ri
Ri + s5
→ Ri
Ri + extu (i4)
→ Ri
Ri + extu (i4)
→ Ri
MSB is interpreted as
a sign in assembly
language
Zero-extension
Sign-extension
SUB
Rj, Ri
A
AC
1
CCCC Ri – Rj
→ Ri
SUBC
Rj, Ri
A
AD
1
CCCC Ri – Rj – c
→ Ri
Subtract operation with
carry
SUBN
Rj, Ri
A
AE
1
– – – – Ri – Rj
→ Ri
Mnemonic
Type
OP
Cycle N Z V C
Operation
Remarks
CMP
Rj, Ri
* CMP
#s5, Ri
CMP
#i4, Ri
CMP2
#i4, Ri
A
C’
C
AA
A8
A9
1
CCCC
Ri – Rj
Ri – s5
Ri + extu (i4)
MSB is interpreted as
a sign in assembly
language
Zero-extension
Sign-extension
Mnemonic
Type
OP
Cycle N Z V C
Operation
Remarks
AND
Rj, Ri
AND
Rj, @Ri
ANDH
Rj, @Ri
ANDB
Rj, @Ri
A
82
84
85
86
1
1 + 2a
CC – –
Ri & = Rj
(Ri) & = Rj
Word
Half word
Byte
OR
Rj, Ri
OR
Rj, @Ri
ORH
Rj, @Ri
ORB
Rj, @Ri
A
92
94
95
96
1
1 + 2a
CC – –
Ri
| = Rj
(Ri) | = Rj
Word
Half word
Byte
EOR
Rj, Ri
EOR
Rj, @Ri
EORH
Rj, @Ri
EORB
Rj, @Ri
A
9A
9C
9D
9E
1
1 + 2a
CC – –
Ri ^ = Rj
(Ri) ^ = Rj
Word
Half word
Byte
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