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參數(shù)資料
| 型號(hào)： | MB91F218SPMC-GTE1 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 14/72頁 |
| 文件大?。?/td> | 1895K |
| 代理商： | MB91F218SPMC-GTE1 |
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MB91210 Series
DS07-16804-3E
21
■ MODE SETTINGS
In the FR family, the operating mode is set by the mode pins (MD3, 2, 1, 0) and the mode register (MODR).
Mode pins
There are four mode pins (MD3 to MD0) to specify how to fetch the mode vector.
Settings other than these in the table are prohibited.
Note: In the FR family, the external mode vector fetch by a multiplex bus is not supported.
Mode data
Data written to the mode register by a mode vector fetch is called mode data.
After an operating mode has been set in the mode register (MODR), the device operates in that operating mode.
The mode data is set by all reset sources. User programs cannot set data to the mode register.
Detailed description of mode data
[bit7 to bit3] Reserved bits
Always set the value to “00000B”.
Normal operation is not guaranteed when a value other than “00000B” is set.
[bit2] ROMA (Internal ROM enable bit)
This bit sets whether to enable F-bus ROM areas.
Mode pin
Mode name
Reset vector
access area
Remarks
MD3 MD2 MD1 MD0
0000
Internal ROM mode vector
Internal
0001
External ROM mode vector
External
Setting is prohibited in this device.
ROMA
Function
Remarks
0
External ROM mode
Internal ROM area (50000H to FFFFFH) becomes the external area.
1
Internal ROM mode
F-bus ROM is enabled.
bit
7
bit
6
bit
5
bit
4
bit
3
bit
2
bit
1
bit
0
00000
ROM
WTH
Operation mode setting bits
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