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參數(shù)資料
| 型號(hào)： | MB91F355APMT-002 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | RISC MICROCONTROLLER, PQFP176 |
| 封裝： | 24 X 24 MM, 1.70 MM HEIGHT, 0.50 MM PPITCH, LEAD FREE, PLASTIC, LQFP-176 |
| 文件頁(yè)數(shù)： | 58/140頁(yè) |
| 文件大?。?/td> | 3803K |
| 代理商： | MB91F355APMT-002 |
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MB91350A Series
24
DS07-16503-5E
Notes on Using the Sub Clock
When the X0A and X1A pins are not connected to an oscillator, pull down the X0A pin and leave the X1A pin open.
Using an external clock (normal)
Treatment of NC and OPEN Pins
Pins marked as NC and OPEN must be left open.
Mode Pins (MD0 to MD2)
These pins should be connected directly to the VCC or VSS pins.
To prevent the device erroneously switching to test mode due to noise, design the printed circuit board such that
the distance between the mode pins and VCC or VSS pins is as short as possible and the connection impedance
is low.
Operation at Start-up
The INIT pin must be at Low level when the power supply is turned on.
Immediately after the power supply is turned on, the Low level input needs to be held to the INIT pin for the
oscillation stabilization wait time of the oscillator circuit to ensure that the oscillator has time to settle (For INIT
via the INIT pin, the oscillation stabilization wait time setting is initialized to the minimum value).
Oscillation Input at Power On
When the power is turned on, maintain the clock input until the device is released from the oscillation stabilization
wait state.
Precautions While Operating in PLL Clock Mode
On this microcontroller, if the crystal oscillator is disconnected or the external reference clock input stops while
PLL clock mode is selected, the microcontroller may continue to operate at the free-run frequency of the self-
oscillating circuit within the PLL. However, Fujitsu does not guarantee this operation.
External Bus Setting
This model guarantees an external bus frequency of 25 MHz.
If the base clock frequency is set to 50 MHz when the DIVR1 (external bus base clock division setting register)
register is still set to the default value, the external bus frequency will be set to 50 MHz. When you change the
base clock frequency, change the base clock frequency after setting the external bus within 25 MHz.
MCLK and SYSCLK
The difference between MCLK and SYSCLK is that MCLK stops in SLEEP/STOP mode but SYSCLK stops only
in STOP mode. Use the clock that is appropriate for each application.
Upon initialization, MCLK is disabled (PORT) and SYSCLK is enabled. To use MCLK, the port function register
(PFR) needs to be set to enable the use of the clock.
X0
X1
OPEN
MB91350A series
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PDF描述 |
|---|---|
| MB91352APMT | RISC MICROCONTROLLER, PQFP120 |
| MB91F353APMT | RISC MICROCONTROLLER, PQFP120 |
| MB91354APMT | 32-BIT, MROM, 50 MHz, RISC MICROCONTROLLER, PQFP176 |
| MB91F356BPMT | RISC MICROCONTROLLER, PQFP176 |
| MB91461PMC-GSE1 | RISC MICROCONTROLLER, PQFP176 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB91F355APMT-GE1 | 制造商:FUJITSU 功能描述:IC 16BIT MCU 5V SMD LQFP176 |
| MB91F356B | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
| MB91F356BPMT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
| MB91F357B | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
| MB91F357BPMT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
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