參數(shù)資料
型號(hào): MB91F467DBPFVS-GSE2
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 96 MHz, RISC MICROCONTROLLER, PQFP208
封裝: 28 X 28 MM, 3.95 MM HEIGHT, 0.50 MM PITCH, PLASTIC, QFP-208
文件頁數(shù): 31/52頁
文件大小: 4330K
代理商: MB91F467DBPFVS-GSE2
MB90895 Series
DS07-13731-5E
37
(4) UART0/UART1 timing
(VCC
= 4.5 V to 5.5 V, VSS = 0.0 V, TA = 40 °C to +125 °C/+150 °C (only MB90F897Y/YS))
* : Refer to "(1) Clock timing" ratings for tCP (internal operation clock cycle time).
Notes:
AC rating in CLK synchronous mode.
CL is a load capacitance value on pins for testing.
Parameter
Symbol
Pin name
Conditions
Value
Unit Remarks
Min
Max
Serial clock cycle time
tSCYC
SCK0/SCK1
Internal shift clock
mode output pin is :
CL
= 80 pF+1TTL
8 tCP *
ns
SCK
↓ → SOT delay time
tSLOV
SCK0/SCK1,
SOT0/SOT1
80
+80
ns
Valid SIN
→ SCK ↑
tIVSH
SCK0/SCK1,
SIN0/SIN1
100
ns
SCK
↑ → valid SIN hold time
tSHIX
SCK0/SCK1,
SIN0/SIN1
60
ns
Serial clock “H” pulse width
tSHSL
SCK0/SCK1
External shift clock
mode output pin is :
CL
= 80 pF+1TTL
4 tCP *
ns
Serial clock “L” pulse width
tSLSH
SCK0/SCK1
4 tCP *
ns
SCK
↓ → SOT delay time
tSLOV
SCK0/SCK1,
SOT0/SOT1
150
ns
Valid SIN
→ SCK ↑
tIVSH
SCK0/SCK1,
SIN0/SIN1
60
ns
SCK
↑ →valid SIN hold time
tSHIX
SCK0/SCK1,
SIN0/SIN1
60
ns
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