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參數(shù)資料
| 型號： | MB91F467MAPMC-GSE2 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP216 |
| 封裝： | 24 X 24 MM, 1.70 MM HEIGHT, 0.40 MM PITCH, LEAD FREE, PLASTIC, QFP-216 |
| 文件頁數(shù)： | 50/128頁 |
| 文件大?。?/td> | 3125K |
| 代理商： | MB91F467MAPMC-GSE2 |
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MB91460M Series
28
DS07-16613-2E
Write to registers which include a status flag (1)
Be careful not to accidentally clear a status flag, when writing into registers which include a status flag (especially
the interrupt request flag).
Take notice that a flag of a status bit is not cleared and the control bit is set to the expected value at writing.
When overwriting the control bit structured by multiple bits simultaneously, it is not possible to use the bit
manipulation instruction. As a result, it is necessary to access data with usual byte/half word/word when writing
to both a control bit and a status flag simultaneously. At this time, be careful not to accidentally clear other bits
(bits in a status flag).
Almost all registers shown below include multiple control bits and status flags.
TBCR
OSCR
TCCS0, TCCS1
ICS01
TMCSR0, TMCSR1, TMCSR2, TMCSR3
PCN0, PCN1, PCN2, PCN3, PCN4, PCN5
ADCSL0, ADCSL1
Note: It is not necessary to take special care when overwriting a single bit by the bit manipulation instruction.
Write to registers which include a status flag (2)
Take notice that actual access will be delayed when writing into registers which include a status flag (especially
the interrupt request flag).
This is because data is written via multiple busses.
For example, when the program exits the interrupt routine after clearing the interrupt request flag, the interrupt
flag may be cleared after accepting the RETI instructions. In this case, the interrupts may be accepted again
because some of the interrupt requests are left at the time of returning from the interrupt routine.
To adjust any discord between this register address and instruction execution, read synchronous registers
(RBSYNC, CBSYNC0/1, and MBSYNC) along with the area where written registers exist.
Adjustment at every writing makes a bus data band width narrow. Therefore, we recommend to adjust only if
necessary. For example, when continuous writing is executed, adjustment at the last writing will be enough.
The table below shows the correspondence between a target area and a synchronous register.
Register name
Target area
RBSYNC
0x0000-0x01FF, 0x0280-0x037D, 0x0400-0x063F, 0x0C00-0x0FFF
(Peripheral function on R-bus)
CBSYNC0/1
0xC000-0xFFFF (CAN on D-bus)
MBSYNC
0x6000-0x6FFF (MediaLB, I2S and FIFO buffer on F-bus)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB91F467MAPMC-GSE1 | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP216 |
| MB91F467TAPMC-GSE2 | RISC MICROCONTROLLER, PQFP144 |
| MB91F469GBPB-GSE1 | 32-BIT, FLASH, 88 MHz, RISC MICROCONTROLLER, PBGA320 |
| MB91F469GAPB-GS | 32-BIT, FLASH, 88 MHz, RISC MICROCONTROLLER, PBGA320 |
| MB91F469GBPB-GS | 32-BIT, FLASH, 88 MHz, RISC MICROCONTROLLER, PBGA320 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB91F467PAPMC-GSE2 | 制造商:FUJITSU 功能描述: |
| MB91F467R | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
| MB91F467RCPMC-GE1 | 制造商:FUJITSU 功能描述: |
| MB91F467RCPMC-GSE1 | 制造商:FUJITSU 功能描述: |
| MB91F467RDPMC-ESE2 | 制造商:FUJITSU 功能描述: |
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