參數(shù)資料
型號： MB95168MAPMC1
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù)： 19/76頁
文件大?。?/td> 2445K
代理商： MB95168MAPMC1
MB95160MA Series
26
DS07–12624–4E
(Continued)
Address
Register
abbreviation
Register name
R/W
Initial value
0FAAH
PDCRH0
16-bit PPG down counter register (upper byte) ch.0
R
00000000B
0FABH
PDCRL0
16-bit PPG down counter register (lower byte) ch.0
R
00000000B
0FACH
PCSRH0
16-bit PPG cycle setting buffer register (upper byte) ch.0
R/W
11111111B
0FADH
PCSRL0
16-bit PPG cycle setting buffer register (lower byte) ch.0
R/W
11111111B
0FAEH
PDUTH0
16-bit PPG duty setting buffer register (upper byte) ch.0
R/W
11111111B
0FAFH
PDUTL0
16-bit PPG duty setting buffer register (lower byte) ch.0
R/W
11111111B
0FB0H
to
0FBBH
(Disabled)
0FBCH
BGR1
LIN-UART baud rate generator register 1
R/W
00000000B
0FBDH
BGR0
LIN-UART baud rate generator register 0
R/W
00000000B
0FBEH
PSSR0
UART/SIO dedicated baud rate generator prescaler se-
lecting register ch.0
R/W
00000000B
0FBFH
BRSR0
UART/SIO dedicated baud rate generator setting register
ch.0
R/W
00000000B
0FC0H
to
0FC2H
(Disabled)
0FC3H
AIDRL
A/D input disable register (lower byte)
R/W
00000000B
0FC4H
LCDCC
LCDC control register
R/W
00010000B
0FC5H
LCDCE1
LCDC enable register 1
R/W
00110000B
0FC6H
LCDCE2
LCDC enable register 2
R/W
00000000B
0FC7H
LCDCE3
LCDC enable register 3
R/W
00000000B
0FC8H
LCDCE4
LCDC enable register 4
R/W
00000000B
0FC9H
LCDCE5
LCDC enable register 5
R/W
00000000B
0FCAH
(Disabled)
0FCBH
LCDCB1
LCDC blinking setting register 1
R/W
00000000B
0FCCH
LCDCB2
LCDC blinking setting register 2
R/W
00000000B
0FCDH
to
0FDCH
LCDRAM
LCDC display RAM
R/W
00000000B
0FDDH
to
0FE2H
(Disabled)
0FE3H
WCDR
Watch counter data register
R/W
00111111B
相關(guān)PDF資料
PDF描述
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