參數(shù)資料
型號: MB95F118JWPMC-GE1
廠商: Fujitsu Semiconductor America Inc
文件頁數(shù): 6/76頁
文件大小: 0K
描述: IC MCU 60K FLASH 2KB RAM 52LQFP
標準包裝: 1
系列: F²MC MB95110M
核心處理器: F²MC-8FX
芯體尺寸: 8-位
速度: 16MHz
連通性: I²C,LIN,SIO,UART/USART
外圍設備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 39
程序存儲器容量: 60KB(60K x 8)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x8/10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 52-LQFP
包裝: 托盤
產(chǎn)品目錄頁面: 722 (CN2011-ZH PDF)
其它名稱: 865-1071
MB95110M Series
14
■ HANDLING DEVICES
Preventing Latch-up
Care must be taken to ensure that maximum voltage ratings are not exceeded when they are used.
Latch-up may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins
other than medium- and high-withstand voltage pins or if higher than the rating voltage is applied between VCC
pin and VSS pin.
When latch-up occurs, power supply current increases rapidly and might thermally damage elements.
Also, take care to prevent the analog power supply voltage (AVCC) and analog input voltage from exceeding the
digital power supply voltage (VCC) when the analog system power supply is turned on or off.
Stable Supply Voltage
Supply voltage should be stabilized.
A sudden change in power-supply voltage may cause a malfunction even within the guaranteed operating range
of the Vcc power-supply voltage.
For stabilization, in principle, keep the variation in Vcc ripple (p-p value) in a commercial frequency range
(50/60 Hz) not to exceed 10% of the standard Vcc value and suppress the voltage variation so that the transient
variation rate does not exceed 0.1 V/ms during a momentary change such as when the power supply is switched.
Precautions for Use of External Clock
Even when an external clock is used, oscillation stabilization wait time is required for power-on reset, wake-up
from sub clock mode or stop mode.
PIN CONNECTION
Treatment of Unused Pin
Leaving unused input pins unconnected can cause abnormal operation or latch-up, leaving to permanent damage.
Unused input pins should always be pulled up or down through resistance of at least 2 k
. Any unused input/
output pins may be set to output mode and left open, or set to input mode and treated the same as unused input
pins. If there is unused output pin, make it open.
Treatment of Power Supply Pins on A/D Converter
Connect to be AVCC
= VCC and AVSS = VSS even if the A/D converter is not in use.
Noise riding on the AVCC pin may cause accuracy degradation. So, connect approx. 0.1
F ceramic capacitor
as a bypass capacitor between AVCC and AVSS pins in the vicinity of this device.
Power Supply Pins
In products with multiple VCC or VSS pins, the pins of the same potential are internally connected in the device
to avoid abnormal operations including latch-up. However, you must connect the pins to external power supply
and a ground line to lower the electro-magnetic emission level, to prevent abnormal operation of strobe signals
caused by the rise in the ground level, and to conform to the total output current rating.
Moreover, connect the current supply source with the VCC and VSS pins of this device at the low impedance.
It is also advisable to connect a ceramic bypass capacitor of approximately 0.1
F between VCC and VSS pins
near this device.
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