參數(shù)資料
型號： MB95F213KPH-G-SNE2
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PDIP8
封裝： 2.54 MM PITCH, PLASTIC, DIP-8
文件頁數(shù)： 26/72頁
文件大?。?/td> 3684K
代理商： MB95F213KPH-G-SNE2
MB95200H/210H Series
32
DS07-12623-5E
2.
Recommended Operating Conditions
(VSS=0.0 V)
*1: The value varies depending on the operating frequency, the machine clock and the analog guaranteed range.
*2: The value is 2.88 V when the low-voltage detection reset is used.
*3: Use a ceramic capacitor or a capacitor with equivalent frequency characteristics. The bypass capacitor for the
VCC pin must have a capacitance larger than CS. For the connection to a smoothing capacitor CS, see the diagram
below. To prevent the device from unintentionally entering an unknown mode due to noise, minimize the distance
between the C pin and CS and the distance between CS and the VSS pin when designing the layout of a printed
circuit board.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the electrical characteristics of the device are warranted when the device
is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact sales
representatives beforehand.
Parameter
Symbol
Value
Unit
Remarks
Min
Max
Power supply
voltage
VCC
2.4*1*2
5.5*1
V
In normal operation
Other than on-chip debug
mode
2.3
5.5
Hold condition in stop mode
2.9
5.5
In normal operation
On-chip debug mode
2.3
5.5
Hold condition in stop mode
Smoothing
capacitor
CS
0.022
1
F
*3
Operating
temperature
TA
-40
+85
°C
Other than on-chip debug function
+5
+35
On-chip debug function
DBG / RSTX / C pin connection diagram
C
Cs
RSTX
DBG
*
Since the DBG pin becomes a communication pin in on-chip debug mode,
set a pull-up resistor value suiting the input/output specifications of P12/DBG.
*:
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