參數(shù)資料
型號: MB95F222KPH-G-SNE2
廠商: Fujitsu Semiconductor America Inc
文件頁數(shù): 4/60頁
文件大小: 0K
描述: IC MCU 8KB FLASH F2MC-8FX 16DIP
標(biāo)準(zhǔn)包裝: 1
系列: F²MC MB95220H
核心處理器: F²MC-8FX
芯體尺寸: 8-位
速度: 16MHz
連通性: LIN,SIO,UART/USART
外圍設(shè)備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: 閃存
RAM 容量: 240 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 5x8/10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-DIP(0.300",7.62mm)
包裝: 管件
其它名稱: 865-1066
MB95220H Series
12
DS07-12626-2E
■ NOTES ON DEVICE HANDLING
Preventing latch-ups
When using the device, ensure that the voltage applied does not exceed the maximum voltage rating.
In a CMOS IC, if a voltage higher than VCC or a voltage lower than VSS is applied to an input/output pin that is
neither a medium-withstand voltage pin nor a high-withstand voltage pin, or if a voltage out of the rating range
of power supply voltage mentioned in 1. Absolute Maximum Ratings of
is applied to the VCC pin or the VSS pin, a latch-up may occur.
When a latch-up occurs, power supply current increases significantly, which may cause a component to be
thermally destroyed.
Stabilizing supply voltage
Supply voltage must be stabilized.
A malfunction may occur when power supply voltage fluctuates rapidly even though the fluctuation is within the
guaranteed operating range of the VCC power supply voltage.
As a rule of voltage stabilization, suppress voltage fluctuation so that the fluctuation in VCC ripple (p-p value) at
the commercial frequency (50 Hz/60 Hz) does not exceed 10% of the standard VCC value, and the transient
fluctuation rate does not exceed 0.1 V/ms at a momentary fluctuation such as switching the power supply.
Notes on using the external clock
When an external clock is used, oscillation stabilization wait time is required for power-on reset, wake-up from
subclock mode or stop mode.
■ PIN CONNECTION
Treatment of unused pins
If an unused input pin is left unconnected, a component may be permanently damaged due to malfunctions or
latch-ups. Always pull up or pull down an unused input pin through a resistor of at least 2 k
Ω. Set an unused
input/output pin to the output state and leave it unconnected, or set it to the input state and treat it the same as
an unused input pin. If there is an unused output pin, leave it unconnected.
Power supply pins
To reduce unnecessary electro-magnetic emission, prevent malfunctions of strobe signals due to an increase
in the ground level, and conform to the total output current standard, always connect the VCC pin and the VSS pin
to the power supply and ground outside the device. In addition, connect the current supply source to the VCC pin
and the VSS pin with low impedance.
It is also advisable to connect a ceramic capacitor of approximately 0.1 F as a bypass capacitor between the
VCC pin and the VSS pin at a location close to this device.
DBG pin
Connect the DBG pin directly to an external pull-up resistor.
To prevent the device from unintentionally entering the debug mode due to noise, minimize the distance between
the DBG pin and the VCC or VSS pin when designing the layout of the printed circuit board.
The DBG pin should not stay at “L” level after power-on until the reset output is released.
RST pin
Connect the RST pin directly to an external pull-up resistor.
To prevent the device from unintentionally entering the reset mode due to noise, minimize the distance between
the RST pin and the VCC or VSS pin when designing the layout of the printed circuit board.
The RST/PF2 pin functions as the reset input/output pin after power-on. In addition, the reset output of the RST/
PF2 pin can be enabled by the RSTOE bit of the SYSC register, and the reset input function and the general
purpose I/O function can be selected by the RSTEN bit of the SYSC register.
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