MB95430H Series
DS07–12xxx–1E
27
3.
DC Characteristics
(VCC = 5.0 V
±10%, VSS = 0.0 V, TA = 40°C to +85°C)
(Continued)
Parameter Symbol
Pin name
Condition
Value
Unit
Remarks
Min
Typ*3
Max
"H" level
input voltage
VIHI
P03, P04, P12,
P65
*1
0.7 VCC
—VCC
+ 0.3 V
When CMOS input
level (hysteresis
input) is selected
VIHS
P00 to P07,
P12,
P60 to P67,
P70 to P76,
PF0, PF1, PG1,
PG2
*1
0.8 VCC
—VCC
+ 0.3 V Hysteresis input
VIHM
PF2
—
0.7 VCC
—VCC
+ 0.3 V Hysteresis input
“L” level
input voltage
VIL
P03, P04, P12,
P65
*1
VSS
0.3 —
0.3 VCC
V
When CMOS input
level (hysteresis
input) is selected
VILS
P00 to P07,
P12,
P60 to P67,
P70 to P76,
PF0, PF1, PG1,
PG2
*1
VSS
0.3 —
0.2 VCC
V
Hysteresis input
VILM
PF2
—
VSS
0.3 —
0.3 VCC
V
Hysteresis input
Open-drain
output
application
voltage
VD
P03, P04, P12,
P65, PF2
—VSS
0.3 — VSS + 5.5 V
P03, P04 and P65
are open-drain
output pins when
assigned as the
SDA/SCL pin of I2C.
“H” level
output
voltage
VOH1
Output pins
other than P05,
P06, P12 and
PF2
IOH =
4 mA
VCC
0.5 —
—
V
VOH2
P05, P06
IOH =
8 mA
VCC
0.5 —
—
V
“L” level
output
voltage
VOL1
Output pins
other than P05
and P06
IOL = 4 mA
—
0.4
V
VOL2
P05, P06
IOL = 12 mA
—
0.4
V
Input leak
current (Hi-Z
output leak
current)
ILI
All input pins
0.0 V < VI < VCC
5—
+5A
When pull-up
resistance is
disabled
Pull-up
resistance
RPULL
P00 to P07,
PG1, PG2
VI = 0 V
25
50
100
k
Ω
When pull-up
resistance is
enabled
Input
capacitance
CIN
Other than VCC
and VSS
f = 1 MHz
—
5
15
pF