參數(shù)資料
型號(hào)： MB96F315AWBPMC-GSE2
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 56 MHz, MICROCONTROLLER, PQFP48
封裝： 7 X 7 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁(yè)數(shù)： 53/84頁(yè)
文件大?。?/td> 1847K
代理商： MB96F315AWBPMC-GSE2
MB96310 Series
DS07-13808-2E
57
4. AC Characteristics
Source Clock timing
(TA = -40°C to 125°C, VCC = AVCC = 3.0V to 5.5V, VSS = AVSS = 0V)
Parameter
Symbol
Pin
Value
Unit
Remarks
Min
Typ
Max
Clock frequency
fC
X0, X1
3
-
16
MHz When using a crystal oscillator, PLL off
0-
16
MHz
When using an opposite phase external
clock, PLL off
3.5
-
16
MHz
When using a crystal oscillator or oppo-
site phase external clock, PLL on
Clock frequency
fFCI
X0
0-
56
MHz
When using a single phase external
clock in “Fast Clock Input mode” , PLL off
3.5
-
56
MHz
When using a single phase external
clock in “Fast Clock Input mode” , PLL on
Clock frequency
fCL
X0A, X1A
32
32.768
100
kHz When using an oscillation circuit
0
-
100
kHz
When using an opposite phase external
clock
X0A
0
-
50
kHz
When using a single phase external
clock
Clock frequency
fCR
-
50
100
200
kHz
When using slow frequency of RC oscil-
lator
12
4
MHz
When using fast frequency of RC oscil-
lator
RC clock stabili-
zation time
tRCSTAB
-
256 RC clock cycles
Applied after any reset and when acti-
vating the RC oscillator.
PLL Clock fre-
quency
fCLKVCO
-
64
-
200
MHz
Permitted VCO output frequency of PLL
(CLKVCO)
PLL Phase Jitter
TPSKEW
--
-
± 5ns
For CLKMC (PLL input clock)
≥ 4MHz,
jitter coming from external oscillator,
crystal or resonator is not covered
Input clock pulse
width
PWH, PWL
X0,X1
8
-
ns
Duty ratio is about 30% to 70%
Input clock pulse
width
PWHL, PWLL
X0A,X1A
5
-
μs
相關(guān)PDF資料
PDF描述
MB96F315ASBPMC-GSE2 16-BIT, FLASH, 56 MHz, MICROCONTROLLER, PQFP48
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MB96F338UWAPMC-GSE2 16-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP144
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參數(shù)描述
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