參數(shù)資料
型號: MB96F338UWAPMC-GSE2
廠商: FUJITSU COMPONENT LTD
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 0.50 MM PITCH, 1.70 MM HEIGHT, PLASTIC, LQFP-144
文件頁數(shù): 119/124頁
文件大?。?/td> 3441K
代理商: MB96F338UWAPMC-GSE2
PRELIMINARY
MB96330 Series
94
FME-MB96330 rev 3
Valid address
Valid data input
(multiplexed)
tAVDV
A[23:16],
AD[15:0]
EACL:ACE=0
EBM:NMS=0
3tCYC
55
ns
w/o cycle
extension
EACL:ACE=1
EBM:NMS=0
4tCYC
55
tADVDV AD[15:0]
EACL:ACE=0
EBM:NMS=0
5tCYC/2
55
ns
w/o cycle
extension
EACL:ACE=1
EBM:NMS=0
7tCYC/2
55
RDX pulse width
tRLRH RDX
3 tCYC/2
5
ns
w/o cycle
extension
RDX
↓ Valid data input tRLDV RDX, AD[15:0]
3tCYC/2
50 ns
w/o cycle
extension
RDX
↑ Data hold time
tRHDX RDX, AD[15:0]
0
ns
Address valid
Data hold
time
tAXDX
A[23:0],
AD[15:0]
0
ns
RDX
↑ ALE ↑ time
tRHLH RDX, ALE
EACL:STS=1 and
EACL:ACE=1
3tCYC/2
10
ns
other ECL:STS,
EACL:ACE setting
tCYC/2
10
Valid address
ECLK ↑ time
tAVCH A[23:0], ECLK
tCYC
15
ns
tADVCH AD[15:0], ECLK
tCYC/2
15
RDX
↓ ECLK ↑ time
tRLCH RDX, ECLK
tCYC/2
10
ns
ALE
↓ RDX ↓ time
tLLRL ALE, RDX
EACL:STS=0
tCYC/2
10
ns
EACL:STS=1
10
ECLK
↑ Valid data input tCHDV AD[15:0], ECLK
tCYC
50
ns
(TA
=40 °Cto +125 °C, VCC = 5.0 V ± 10%,VSS = 0.0 V, IOdrive =5mA,CL = 50pF)
Parameter
Sym-
bol
Pin
Conditions
Value
Unit
Remarks
Min
Max
相關(guān)PDF資料
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