參數(shù)資料
型號: MB96F356RWBPMC1-GSE2
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 56 MHz, RISC MICROCONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LFQFP-64
文件頁數(shù): 65/114頁
文件大?。?/td> 1306K
代理商: MB96F356RWBPMC1-GSE2
PRELIMINARY
MB96350 Series
FME-MB96350 rev 5
54
2008-2-4
opposite phase to the X0 (X0A) pins.
4.
Unused sub clock signal
If the pins X0A and X1A are not connected to an oscillator, a pull-down resistor must be connected on the
X0A pin and the X1A pin must be left open.
5.
Notes on PLL clock mode operation
If the PLL clock mode is selected and no external oscillator is operating or no external clock is supplied, the
microcontroller attempts to work with the free oscillating PLL. Performance of this operation, however, cannot
be guaranteed.
6.
Power supply pins (VCC/VSS)
It is required that all VCC-level as well as all VSS-level power supply pins are at the same potential. If there is
more than one VCC or VSS level, the device may operate incorrectly or be damaged even within the guaranteed
operating range.
VCC and VSS must be connected to the device from the power supply with lowest possible impedance.
As a measure against power supply noise, it is required to connect a bypass capacitor of about 0.1
F
between VCC and VSS as close as possible to VCC and VSS pins.
7.
Crystal oscillator circuit
Noise at X0 or X1 pins might cause abnormal operation. It is required to provide bypass capacitors with
shortest possible distance to X0, X1 pins, crystal oscillator (or ceramic resonator) and ground lines, and, to
the utmost effort, that the lines of oscillation circuit do not cross the lines of other circuits.
It is highly recommended to provide a printed circuit board art work surrounding X0 and X1 pins with a ground
area for stabilizing the operation.
It is highly recommended to evaluate the quartz/MCU system at the quartz manufacturer.
8.
Turn on sequence of power supply to A/D converter and analog inputs
It is required to turn the A/D converter power supply (AVCC, AVRH, AVRL) and analog inputs (ANn) on after
turning the digital power supply (VCC) on.
It is also required to turn the digital power off after turning the A/D converter supply and analog inputs off. In
this case, the voltage must not exceed AVRH or AVCC (turning the analog and digital power supplies
simultaneously on or off is acceptable).
9.
Pin handling when not using the A/D converter
It is required to connect the unused pins of the A/D converter as AVCC = VCC
, AVSS = AVRH = AVRL = VSS.
10. Notes on energization
To prevent malfunction of the internal voltage regulator, supply voltage profile while turning the power supply
on should be slower than 50
s from 0.2 V to 2.7 V.
11. Stabilization of power supply voltage
X0
X1
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