參數資料
型號: MB96F356YSBPMC-GSE2
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 56 MHz, RISC MICROCONTROLLER, PQFP64
封裝: 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LFQFP-64
文件頁數: 40/114頁
文件大?。?/td> 1306K
代理商: MB96F356YSBPMC-GSE2
PRELIMINARY
MB96350 Series
FME-MB96350 rev 5
2008-2-4
31
000392H
DMA - Stop status register low byte
DSSRL
DSSR
RW
000393H
DMA - Stop status register high byte
DSSRH
RW
000394H
DMA - Enable register low byte
DERL
DER
RW
000395H
DMA - Enable register high byte
DERH
RW
000396H-
00039FH
Reserved
-
0003A0H
Interrupt level register
ILR
ICR
RW
0003A1H
Interrupt index register
IDX
RW
0003A2H
Interrupt vector table base register Low
TBRL
TBR
RW
0003A3H
Interrupt vector table base register High
TBRH
RW
0003A4H
Delayed Interrupt register
DIRR
RW
0003A5H
Non Maskable Interrupt register
NMI
RW
0003A6H-
0003ABH
Reserved
-
0003ACH
EDSU communication interrupt selection Low
EDSU2L
EDSU2
RW
0003ADH
EDSU communication interrupt selection High
EDSU2H
RW
0003AEH
ROM mirror control register
ROMM
RW
0003AFH
EDSU conguration register
EDSU
RW
0003B0H
Memory patch control/status register ch 0/1
PFCS0
RW
0003B1H
Memory patch control/status register ch 0/1
RW
0003B2H
Memory patch control/status register ch 2/3
PFCS1
RW
0003B3H
Memory patch control/status register ch 2/3
RW
0003B4H
Memory patch control/status register ch 4/5
PFCS2
RW
0003B5H
Memory patch control/status register ch 4/5
RW
0003B6H
Memory patch control/status register ch 6/7
PFCS3
RW
0003B7H
Memory patch control/status register ch 6/7
RW
0003B8H
Memory Patch function - Patch address 0 low
PFAL0
RW
0003B9H
Memory Patch function - Patch address 0 middle
PFAM0
RW
0003BAH
Memory Patch function - Patch address 0 high
PFAH0
RW
0003BBH
Memory Patch function - Patch address 1 low
PFAL1
RW
0003BCH
Memory Patch function - Patch address 1 middle
PFAM1
RW
I/O map MB96(F)35x (9 / 27)
Address
Register
Abbreviation
8-bit access
Abbreviation
16-bit access
Access
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