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參數(shù)資料
| 型號： | MB98A9103 |
| 廠商： | Fujitsu Limited |
| 英文描述： | Low Power Static Random Access Memory Card(1M低功耗靜態(tài)存儲器) |
| 中文描述： | 低功耗靜態(tài)隨機存取記憶卡（1分低功耗靜態(tài)存儲器） |
| 文件頁數(shù)： | 17/32頁 |
| 文件大?。?/td> | 557K |
| 代理商： | MB98A9103 |
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17
MB98A9083x
/
9093x/9103x/9113x
-20
MAIN MEMORY WRITE CYCLE *1
ATTRIBUTE MEMORY WRITE CYCLE *4
Notes:
*1.
If OE, CE
1
, and CE
2
are in the Read Mode during this period, then the I/O pins are in the output state
and the input signals of the phase opposite to the outputs must be applied.
Transition is measured at the point of
±
500 mV from steady state voltage.
This parameter is specified only during write cycle with OE = V
IL
and specified using Load II in Fig.3.
This parameter is for MB98A90833, 90933, 91033 and 91133.
*2.
*3.
*4.
Parameter
Notes
Symbol
Min.
Max.
Unit
Write Cycle Time
t
WC
200
—
ns
Address Valid to End of Write
t
AW
140
—
ns
Chip Select to End of Write
t
CW
140
—
ns
Data Valid to End of Write
t
DW
60
—
ns
Data Hold Time
t
DH
30
—
ns
Write Pulse Width
t
WP
120
—
ns
Address Set Up Time
t
AS
20
—
ns
Write Recovery Time
t
WR
30
—
ns
Output Enable to Output Low-Z
*2
t
OLZ
5
—
ns
Output Enable to Output High-Z
*2
t
OHZ
—
50
ns
Write Enable to Output Low-Z
*2, 3
t
WLZ
5
—
ns
Write Enable to Output High-Z
*2, 3
t
WHZ
—
50
ns
Output Enable Set Up Time
t
OES
10
—
ns
Output Enable Hold Time
t
OEH
10
—
ns
Parameter
Symbol
Min.
Max.
Unit
Byte Write Cycle Time
t
RWR
—
10
ms
Address Set Up Time
t
RAS
20
—
ns
Chip Enable Set Up Time
t
RCS
0
—
ns
Output Enable Set Up Time
t
ROES
20
—
ns
Write Pulse Width
t
RWP
100
—
ns
Address Hold Time
t
RAH
50
—
ns
Data Set Up Time
t
RDS
50
—
ns
Data Hold Time
t
RDH
20
—
ns
Chip Enable Hold Time
t
RCH
0
—
ns
Output Enable Hold Time
t
ROEH
20
—
ns
Write Recovery Time
t
RRE
50
—
ns
End of Write to Output Time
t
RRBO
—
100
ns
Number of Write per Byte
N
10000
—
Times
Write Enable Hold Time
t
RWEH
10
—
ns
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