參數(shù)資料
型號： MB9BF116SPMC
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, RISC MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-144
文件頁數(shù)： 29/116頁
文件大?。?/td> 1051K
代理商： MB9BF116SPMC
2
FUJITSU SEMICONDUCTOR CONFIDENTIAL
r1.0
MB9B110T Series
DS706-00016-0v01-E
FEATURES
32-bit ARM Cortex-M3 Core
·
Processor version: r2p1
·
Up to 144MHz Frequency Operation
·
Memory Protection Unit (MPU):improves the reliability of an embedded system
·
Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48
peripheral interrupts and 16 priority levels
·
24-bit System timer (Sys Tick): System timer for OS task management
On-chip Memories
[Flash memory]
·
Up to 1 Mbyte
·
Built-in Flash Accelerator System with 16Kbyte trace buffer memory
The read access to Flash memory can be achieved without wait cycle up to operation frequency of
72MHz. Even at the operation frequency more than 72MHz, an equivalent access to Flash memory can
be obtained by Flash Accelerator System.
·
Security function for code protection
[SRAM]
This Series contain a total of up to 128Kbyte on-chip SRAM memories. This is composed of two
independent SRAM (SRAM0,SRAM1) . SRAM0 is connected to I-code bus or D-code bus of Cortex-M3
core. SRAM1 is connected to System bus.
·
SRAM0: Up to 64 Kbyte.
·
SRAM1: Up to 64 Kbyte.
External Bus Interface
·
Supports SRAM, NOR and NAND Flash device
·
Up to 8 chip selects
·
8/16-bit Data width
·
Up to 25-bit Address bit
·
Supports Address/Data multiplex
·
Supports external RDY input
Multi-function Serial Interface (Max 8channels)
·
4 channels with 16-byte FIFO (ch.4-ch.7), 4 channels without FIFO (ch.0-ch.3)
·
Operation mode is selectable from the followings for each channel.
·
UART
·
CSIO
·
LIN
·
I2C
[UART]
·
Full-duplex double buffer
·
Selection with or without parity supported
·
Built-in dedicated baud rate generator
·
External clock available as a serial clock
·
Hardware Flow control : Automatically control the transmission by CTS/RTS (only ch.4)
·
Various error detect functions available (parity errors, framing errors, and overrun errors)
[CSIO]
·
Full-duplex double buffer
·
Built-in dedicated baud rate generator
·
Overrun error detect function available
相關(guān)PDF資料
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