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參數(shù)資料
| 型號： | MBM29DL161TE-90 |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16M (2M X 8/1M X 16) BIT Dual Operation |
| 中文描述： | 16米（2米x 8/1M × 16）位雙操作 |
| 文件頁數(shù)： | 31/75頁 |
| 文件大小： | 1089K |
| 代理商： | MBM29DL161TE-90 |
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MBM29DL16XTE/BE
-70/90/12
31
If the software (program code) for Autoselect command is stored into the Flash memory, the device and
manufacture codes should be read from the other bank where is not contain the software.
To terminate the operation, it is necessary to write the Read/Reset command sequence into the register, and
also to write the Autoselect command during the operation, execute it after writing Read/Reset command
sequence.
Byte/Word Programming
The devices are programmed on a byte-by-byte (or word-by-word) basis. Programming is a four bus cycle
operation. There are two “unlock” write cycles. These are followed by the program set-up command and data
write cycles. Addresses are latched on the falling edge of CE or WE, whichever happens later and the data is
latched on the rising edge of CE or WE, whichever happens first. The rising edge of CE or WE (whichever
happens first) begins programming. Upon executing the Embedded Program Algorithm command sequence,
the system is not required to provide further controls or timings. The device will automatically provide adequate
internally generated program pulses and verify the programmed cell margin.
The system can determine the status of the program operation by using DQ
7
(Data Polling), DQ
6
(Toggle Bit),
or RY/BY. The Data Polling and Toggle Bit must be performed at the memory location which is being programmed.
The automatic programming operation is completed when the data on DQ
7
is equivalent to data written to this
bit at which time the devices return to the read mode and addresses are no longer latched. (See Table 13,
Hardware Sequence Flags.) Therefore, the devices require that a valid address to the devices be supplied by
the system at this particular instance of time. Hence, Data Polling must be performed at the memory location
which is being programmed.
Any commands written to the chip during this period will be ignored. If hardware reset occurs during the
programming operation, it is impossible to guarantee the data are being written.
Programming is allowed in any sequence and across sector boundaries. Beware that a data “0” cannot be
programmed back to a “1”. Attempting to do so may either hang up the device or result in an apparent success
according to the data polling algorithm but a read from Read/Reset mode will show that the data is still “0”. Only
erase operations can convert “0”s to “1”s.
Figure 22 illustrates the Embedded Program
TM
Algorithm using typical command strings and bus operations.
Program Suspend/Resume
The Program Suspend command allows the system to interrupt a program operation so that data can be read
from any address.Writing the Program Suspend command (B0H) during the Embedded Program operation
immediately suspends the programming.The Program Suspend command mav also be issued during a
programming operation while an erase is suspend.The bank addresses of sector being programed should be
set when writing the Program Suspend command.
When the Program Suspend command is written during a programming process , the device halts the program
operation within 1
μ
s and updates the status bits.
After the program operation has been suspended, the system can read data from any address.The data at
program-suspend address is not valid. Normal read timing and command definitions apply.
After the Program Resume command (30 H) is written, the device reverts to programming. The bank addresses
of sector being suspended should be set when writing the Program Resume command. The system can
determine the status of the program operation using the DQ
7
or DQ
6
status bits, just as in the standard program
operation.See “Write Operation Status” for more information.
The system may also write the autoselect command sequence when the device in the Program Suspend mode.
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