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    參數資料
    型號: MBM29DL162BE70PFTR
    廠商: Fujitsu Limited
    英文描述: 16M (2M x 8/1M x 16) BIT Dual Operation
    中文描述: 16米(2米x 8/1M × 16)位雙操作
    文件頁數: 3/75頁
    文件大?。?/td> 1089K
    代理商: MBM29DL162BE70PFTR
    MBM29DL16XTE/BE
    -70/90/12
    3
    I
    GENERAL DESCRIPTION
    The MBM29DL16XTE/BE are a 16M-bit, 3.0 V-only Flash memory organized as 2M bytes of 8 bits each or 1M
    words of 16 bits each. The MBM29DL16XTE/BE are offered in a 48-pin TSOP(I) and 48-ball FBGA Package.
    These devices are designed to be programmed in-system with the standard system 3.0 V V
    CC
    supply. 12.0 V
    V
    PP
    and 5.0 V V
    CC
    are not required for write or erase operations. The devices can also be reprogrammed in
    standard EPROM programmers.
    MBM29DL16XTE/BE are organized into two banks, Bank 1 and Bank 2, which can be considered to be two
    separate memory arrays as far as certain operations are concerned. These devices are the same as Fujitsu’s
    standard 3 V only Flash memories with the additional capability of allowing a normal non-delayed read access
    from a non-busy bank of the array while an embedded write (either a program or an erase) operation is
    simultaneously taking place on the other bank.
    In the MBM29DL16XTE/BE, a new design concept is implemented, so called “Sliding Bank Architecture”. Under
    this concept, the MBM29DL16XTE/BE can be produced a series of devices with different Bank 1/Bank 2 size
    combinations; 0.5 Mb/15.5 Mb, 2 Mb/14 Mb, 4 Mb/12 Mb, 8 Mb/8 Mb.
    The standard MBM29DL16XTE/BE offer access times 70 ns, 90 ns and 120 ns, allowing operation of high-speed
    microprocessors without wait states. To eliminate bus contention the devices have separate chip enable (CE),
    write enable (WE), and output enable (OE) controls.
    The MBM29DL16XTE/BE are pin and command set compatible with JEDEC standard E
    2
    PROMs. Commands
    are written to the command register using standard microprocessor write timings. Register contents serve as
    input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally
    latch addresses and data needed for the programming and erase operations. Reading data out of the devices
    is similar to reading from 5.0 V and 12.0 V Flash or EPROM devices.
    The MBM29DL16XTE/BE are programmed by executing the program command sequence. This will invoke the
    Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths
    and verifies proper cell margin. Typically, each sector can be programmed and verified in about 0.5 seconds.
    Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase
    Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed
    before executing the erase operation. During erase, the devices automatically time the erase pulse widths and
    verify proper cell margin.
    A sector is typically erased and verified in 1.0 second. (If already completely preprogrammed.)
    The devices also feature a sector erase architecture. The sector mode allows each sector to be erased and
    reprogrammed without affecting other sectors. The MBM29DL16XTE/BE are erased when shipped from the
    factory.
    The devices feature single 3.0 V power supply operation for both read and write functions. Internally generated
    and regulated voltages are provided for the program and erase operations. A low V
    CC
    detector automatically
    inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ
    7
    ,
    by the Toggle Bit feature on DQ
    6
    , or the RY/BY output pin. Once the end of a program or erase cycle has been
    completed, the devices internally reset to the read mode.
    Fujitsu’s Flash technology combines years of EPROM and E
    2
    PROM experience to produce the highest levels
    of quality, reliability, and cost effectiveness. The MBM29DL16XTE/BE memories electrically erase the entire chip
    or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one
    byte/word at a time using the EPROM programming mechanism of hot electron injection.
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