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參數(shù)資料
| 型號(hào)： | MBM29DL321BD-80PBT |
| 廠商： | FUJITSU LTD |
| 元件分類： | DRAM |
| 英文描述： | OFFICE 802.3 TRANS CBL 1M |
| 中文描述： | 4M X 8 FLASH 3V PROM, 80 ns, PBGA57 |
| 封裝： | PLASTIC, FBGA-57 |
| 文件頁數(shù)： | 2/80頁 |
| 文件大?。?/td> | 1588K |
| 代理商： | MBM29DL321BD-80PBT |
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MBM29DL32XTE/BE
-80/90/12
2
)
(Continued)
In the MBM29DL32XTE/BE, a new design concept is implemented, so called “Sliding Bank Architecture”. Under
this concept, the MBM29DL32XTE/BE can be produced a series of devices with different Bank 1/Bank 2 size
combinations; 0.5 Mb/31.5 Mb, 4 Mb/28 Mb, 8 Mb/24 Mb, 16 Mb/16 Mb.
To eliminate bus contention the devices have separate chip enable (CE), write enable (WE), and output enable
(OE) controls.
The MBM29DL32XTE/BE are pin and command set compatible with JEDEC standard E
2
PROMs. Commands
are written to the command register using standard microprocessor write timings. Register contents serve as
input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally
latch addresses and data needed for the programming and erase operations.
Typically, each sector can be programmed and verified in about 0.5 seconds.
A sector is typically erased and verified in 1.0 second. (If already completely preprogrammed.)
The devices also feature a sector erase architecture. The sector mode allows each sector to be erased and
reprogrammed without affecting other sectors. The MBM29DL32XTE/BE are erased when shipped from the
factory.
Internally generated and regulated voltages are provided for the program and erase operations. A low V
CC
detector
automatically inhibits write operations on the loss of power. The end of program or erase is detected by Data
Polling of DQ
7
, by the Toggle Bit feature on DQ
6
, or the RY/BY output pin. Once the end of a program or erase
cycle has been completed, the devices internally reset to the read mode.
The MBM29DL32XTE/BE memories electrically erase the entire chip or all bits within a sector simultaneously
via Fowler-Nordhiem tunneling. The bytes/words are programmed one byte/word at a time using the EPROM
programming mechanism of hot electron injection.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MBM29DL321BE-12PBT | MICRO SINGLE MODE FIBER TRANCEIVER, ST |
| MBM29DL321BE-12TN | PCI 10BASE T/10 BASE FL NIC, S |
| MBM29DL321BE-12TR | 8 PORT MODULAR SWITCH |
| MBM29DL321BE-80PBT | 16 PORT MODULAR SWITCH |
| MBM29DL321BE-80TN | LE1416A BLANK FACE PLATE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29DL321BD-80PFTN | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M X 8/2M X 16) BIT Dual Operation |
| MBM29DL321BD-80PFTR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M X 8/2M X 16) BIT Dual Operation |
| MBM29DL321BD-90 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M X 8/2M X 16) BIT Dual Operation |
| MBM29DL321BE | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL321BE12PBT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M x 8/2M x 16) BIT Dual Operation |
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