- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377939 > MBM29DL322TD-80PFTN (FUJITSU LTD) 32M (4M X 8/2M X 16) BIT Dual Operation PDF資料下載
參數(shù)資料
| 型號： | MBM29DL322TD-80PFTN |
| 廠商： | FUJITSU LTD |
| 元件分類： | DRAM |
| 英文描述： | 32M (4M X 8/2M X 16) BIT Dual Operation |
| 中文描述： | 4M X 8 FLASH 3V PROM, 80 ns, PDSO48 |
| 封裝： | PLASTIC, TSOP1-48 |
| 文件頁數(shù)： | 41/80頁 |
| 文件大小： | 1588K |
| 代理商： | MBM29DL322TD-80PFTN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁當(dāng)前第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
MBM29DL32XTE/BE
-80/90/12
41
programmed to sectors that are not erase-suspended. Successively reading from the erase-suspended sector
while the devices are in the erase-suspend-program mode will cause DQ
2
to toggle. The end of the erase-
suspended Program operation is detected by the RY/BY output pin, Data polling of DQ
7
or by the Toggle Bit I
(DQ
6
) which is the same as the regular Program operation. Note that DQ
7
must be read from the Program address
while DQ
6
can be read from any address within bank being erase-suspended.
To resume the operation of Sector Erase, the Resume command (30h) should be written to the bank being erase
suspended. Any further writes of the Resume command at this point will be ignored. Another Erase Suspend
command can be written after the chip has resumed erasing.
Extended Command
(1) Fast Mode
MBM29DL32XTE/BE has Fast Mode function. This mode dispenses with the initial two unclock cycles
required in the standard program command sequence by writing Fast Mode command into the command
register. In this mode, the required bus cycle for programming is two cycles instead of four bus cycles in
standard program command. (Do not write erase command in this mode.) The read operation is also executed
after exiting this mode. To exit this mode, it is necessary to write Fast Mode Reset command into the command
register. The first cycle must contain the bank address. (Refer to the Figure 28.) The V
CC
active current is
required even CE = V
IH
during Fast Mode.
(2) Fast Programming
During Fast Mode, the programming can be executed with two bus cycles operation. The Embedded Program
Algorithm is executed by writing program set-up command (A0h) and data write cycles (PA/PD). (Refer to
the Figure 28.)
(3) Extended Sector Group Protection
In addition to normal sector group protection, the MBM29DL32XTE/BE has Extended Sector Group Protection
as extended function. This function enable to protect sector group by forcing V
ID
on RESET pin and write a
command sequence. Unlike conventional procedure, it is not necessary to force V
ID
and control timing for
control pins. The only RESET pin requires V
ID
for sector group protection in this mode. The extended sector
group protection requires V
ID
on RESET pin. With this condition, the operation is initiated by writing the set-
up command (60h) into the command register. Then, the sector group addresses pins (A
20
, A
19
, A
18
, A
17
, A
16
,
A
15
, A
14
, A
13
and A
12
) and (A
6
, A
1
, A
0
) = (0, 1, 0) should be set to the sector group to be protected (recommend
to set V
IL
for the other addresses pins), and write extended sector group protection command (60h). A sector
group is typically protected in 250
μ
s. To verify programming of the protection circuitry, the sector group
addresses pins (A
20
, A
19
, A
18
, A
17
, A
16
, A
15
, A
14
, A
13
and A
12
) and (A
6
, A
1
, A
0
) = (0, 1, 0) should be set and write
a command (40h). Following the command write, a logical “1” at device output DQ
0
will produce for protected
sector in the read operation. If the output data is logical “0”, please repeat to write extended sector group
protection command (60h) again. To terminate the operation, it is necessary to set RESET pin to V
IH
. (Refer
to the Figures 20 and 29.)
(4) CFI (Common Flash Memory Interface)
The CFI (Common Flash Memory Interface) specification outlines device and host system software interro-
gation handshake which allows specific vendor-specified software algorithms to be used for entire families
of devices. This allows device-independent, JEDEC ID-independent, and forward-and backward-compatible
software support for the specified flash device families. Refer to CFI specification in detail.
The operation is initiated by writing the query command (98h) into the command register. The bank address
should be set when writing this command. Then the device information can be read from the bank, and an
actual data of memory cell be read from the another bank. Following the command write, a read cycle from
specific address retrieves device information. Please note that output data of upper byte (DQ
8
to DQ
15
) is “0”
in word mode (16 bit) read. Refer to the CFI code table. To terminate operation, it is necessary to write the
read/reset command sequence into the register. (See Table 12.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MBM29DL322TD-80PFTR | 32M (4M X 8/2M X 16) BIT Dual Operation |
| MBM29DL322TD-90 | 32M (4M X 8/2M X 16) BIT Dual Operation |
| MBM29DL322TE-12PBT | 32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL322TE-12TN | 32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL322TE-12TR | 32M (4M x 8/2M x 16) BIT Dual Operation |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29DL322TD-80PFTR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M X 8/2M X 16) BIT Dual Operation |
| MBM29DL322TD-90 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M X 8/2M X 16) BIT Dual Operation |
| MBM29DL322TE | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL322TE12PBT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL322TE-12PBT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M x 8/2M x 16) BIT Dual Operation |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。