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參數(shù)資料
| 型號： | MBM29DL323TE80PBT |
| 廠商： | FUJITSU LTD |
| 元件分類： | DRAM |
| 英文描述： | 32M (4M x 8/2M x 16) BIT Dual Operation |
| 中文描述： | 2M X 16 FLASH 3V PROM, 80 ns, PBGA63 |
| 封裝： | PLASTIC, FBGA-63 |
| 文件頁數(shù)： | 35/80頁 |
| 文件大小： | 1588K |
| 代理商： | MBM29DL323TE80PBT |
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MBM29DL32XTE/BE
-80/90/12
35
Standby Mode
There are two ways to implement the standby mode on the MBM29DL32XTE/BE devices, one using both the
CE and RESET pins; the other via the RESET pin only.
When using both pins, a CMOS standby mode is achieved with CE and RESET inputs both held at V
CC
± 0.3 V.
Under this condition the current consumed is less than 5
μ
A Max. During Embedded Algorithm operation, V
CC
active current (I
CC2
) is required even CE = “H”. The device can be read with standard access time (t
CE
) from either
of these standby modes.
When using the RESET pin only, a CMOS standby mode is achieved with RESET input held at V
SS
± 0.3 V (CE
= “H” or “L”). Under this condition the current is consumed is less than 5
μ
A Max. Once the RESET pin is taken
high, the device requires t
RH
of wake up time before outputs are valid for read access.
In the standby mode the outputs are in the high impedance state, independent of the OE input.
Automatic Sleep Mode
There is a function called automatic sleep mode to restrain power consumption during read-out of
MBM29DL32XTE/BE data. This mode can be used effectively with an application requested low power con-
sumption such as handy terminals.
To activate this mode, MBM29DL32XTE/BE automatically switch themselves to low power mode when
MBM29DL32XTE/BE addresses remain stably during access fine of 150 ns. It is not necessary to control CE,
WE, and OE on the mode. Under the mode, the current consumed is typically 1
μ
A (CMOS Level).
During simultaneous operation, V
CC
active current (I
CC2
) is required.
Since the data are latched during this mode, the data are read-out continuously. If the addresses are changed,
the mode is canceled automatically and MBM29DL32XTE/BE read-out the data for changed addresses.
Output Disable
With the OE input at a logic high level (V
IH
), output from the devices are disabled. This will cause the output pins
to be in a high impedance state.
Autoselect
The autoselect mode allows the reading out of a binary code from the devices and will identify its manufacturer
and type. This mode is intended for use by programming equipment for the purpose of automatically matching
the devices to be programmed with its corresponding programming algorithm. This mode is functional over the
entire temperature range of the devices.
To activate this mode, the programming equipment must force V
ID
(11.5 V to 12.5 V) on address pin A
9
. Two
identifier bytes may then be sequenced from the devices outputs by toggling address A
0
from V
IL
to V
IH
. All
addresses are DON’T CARES except A
0
, A
1
, and A
6
(A
-1
). (See Tables 3 and 4.)
The manufacturer and device codes may also be read via the command register, for instances when the
MBM29DL32XTE/BE are erased or programmed in a system without access to high voltage on the A
9
pin. The
command sequence is illustrated in Table 5. (Refer to Autoselect Command section.)
Byte 0 (A
0
= V
IL
) represents the manufacturer’s code (Fujitsu = 04h) and word 1 (A
0
= V
IH
) represents the device
identifier code (MBM29DL321TE = 59h and MBM29DL321BE = 5Ah for
×
8 mode; MBM29DL321TE = 2259h
and MBM29DL321BE = 225Ah for
×
16 mode). (MBM29DL322TE = 55h and MBM29DL322BE = 56h for
×
8
mode; MBM29DL322TE = 2255h and MBM29DL322BE = 2256h for
×
16 mode). (MBM29DL323TE = 50h and
MBM29DL323BE = 53h for
×
8 mode; MBM29DL323TE = 2250h and MBM29DL323BE = 2253h for
×
16 mode).
(MBM29DL324TE = 5Ch and MBM29DL324BE = 5Fh for
×
8 mode; MBM29DL324TE = 225Ch and
MBM29DL324BE = 225Fh for
×
16 mode). These two bytes/words are given in the tables 11.1 to 11.8. All
identifiers for manufactures and device will exhibit odd parity with DQ
7
defined as the parity bit. In order to read
the proper device codes when executing the autoselect, A
1
must be V
IL
. (See Tables 6.1 to 6.8.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MBM29DL324TE80PBT | 32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL321TE80TN | 32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL322TE80TN | 32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL323TE80TN | 32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL324TE80TN | 32M (4M x 8/2M x 16) BIT Dual Operation |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29DL323TE-80PBT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL323TE80TN | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL323TE-80TN | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL323TE80TR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M x 8/2M x 16) BIT Dual Operation |
| MBM29DL323TE-80TR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32M (4M x 8/2M x 16) BIT Dual Operation |
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