參數(shù)資料
型號： MBM29F017A-12PFTN
廠商： FUJITSU LTD
元件分類： DRAM
英文描述： CAT5E PATCH CORD, 100FT ORANGE, MOLDED
中文描述： 2M X 8 FLASH 5V PROM, 120 ns, PDSO48
封裝： PLASTIC, TSOP-48
文件頁數(shù)： 18/47頁
文件大?。?/td> 469K
代理商： MBM29F017A-12PFTN
18
MBM29F017A
-70/-90/-12
Write Operation Status
Notes:
1. Performing successive read operations from any address will cause DQ
6
to toggle.
2. Reading the byte address being programmed while in the erase-suspend program mode will indicate logic
“1” at the DQ
2
bit. However, successive reads from the erase-suspended sector will cause DQ
2
to toggle.
3. DQ
0
and DQ
1
are reserved pins for future use.
4. DQ
4
is Fujitsu internal use only.
DQ
7
Data Polling
The MBM29F017A device features Data Polling as a method to indicate to the host that the embedded algorithms
are in progress or completed. During the Embedded Program
TM
Algorithm, an attempt to read the device will
produce the complement of the data last written to DQ
7
. Upon completion of the Embedded Program
TM
Algorithm,
an attempt to read the device will produce the true data last written to DQ
7
. During the Embedded Erase
TM
Algorithm, an attempt to read the device will produce a “0” at the DQ
7
output. Upon completion of the Embedded
Erase
TM
Algorithm an attempt to read the device will produce a “1” at the DQ
7
output. The flowchart for Data
Polling (DQ
7
) is shown in Figure 17.
Data polling will also flag the entry into Erase Suspend. DQ
7
will switch “0” to “1” at the start of the Erase Suspend
mode. Please note that the address of an erasing sector must be applied in order to observe DQ
7
in the Erase
Suspend Mode.
During Program in Erase Suspend, Data polling will perform the same as in regular program execution outside
of the suspend mode.
For chip erase, the Data Polling is valid after the rising edge of the sixth WE pulse in the six write pulse sequence.
For sector erase, the Data Polling is valid after the last rising edge of the sector erase WE pulse. Data Polling
must be performed at sector address within any of the sectors being erased and not a sector that is within a
protected sector group. Otherwise, the status may not be valid.
Just prior to the completion of Embedded Algorithm operation DQ
7
may change asynchronously while the output
enable (OE) is asserted low. This means that the device is driving status information on DQ
7
at one instant of
time and then that byte's valid data at the next instant of time. Depending on when the system samples the DQ
7
output, it may read the status or valid data. Even if the device has completed the Embedded Algorithm operations
Table 7 Hardware Sequence Flags
Status
DQ
7
DQ
6
DQ
5
DQ
3
DQ
2
In progress
Embedded Program
TM
Algorithm
DQ
7
Toggle
0
0
1
Embedded Erase
TM
Algorithm
0
Toggle
0
1
Toggle
Erase
Suspended
Mode
Erase Suspend Read
(Erase Suspended Sector)
1
1
0
0
Toggle
Erase Suspend Read
(Non-Erase Suspended Sector)
Data
Data
Data
Data
Data
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ
7
Toggle
(Note 1)
0
0
1
(Note 2)
Exceeded
Time Limits
Embedded Program
TM
Algorithm
DQ
7
Toggle
1
0
1
Embedded Erase
TM
Algorithm
0
Toggle
1
1
N/A
Erase
Suspended
Mode
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ
7
Toggle
1
0
N/A
相關PDF資料
PDF描述
MBM29F017A-12PFTR CAT 5E BULK CABLE 100 MHZ,SHLD,PVC-BLUE
MBM29F017A-12PNS CAT 5E BULK CABLE 100 MHZ,SHLD,PVC-YELLOW
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相關代理商/技術(shù)參數(shù)
參數(shù)描述
MBM29F017A-12PFTR 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 16M (2M x 8) BIT
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MBM29F017A-70PFTR 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16M (2M X 8) BIT
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