參數(shù)資料
型號: MBM29F017A-70PFTR
廠商: FUJITSU LTD
元件分類: DRAM
英文描述: 16M (2M X 8) BIT
中文描述: 2M X 8 FLASH 5V PROM, 70 ns, PDSO48
封裝: PLASTIC, REVERSE, TSOP-48
文件頁數(shù): 30/47頁
文件大小: 469K
代理商: MBM29F017A-70PFTR
30
MBM29F017A
-70/-90/-12
Figure 6 Alternate WE Controlled Program Operation Timings
Notes:
1. PA is address of the memory location to be programmed.
2. PD is data to be programmed at byte address.
3. DQ
7
is the output of the complement of the data written to the device.
4. D
OUT
is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
t
CH
t
CS
t
WP
t
WHWH1
t
WC
CE
OE
t
RC
A
0
to A
20
Data
t
GHWL
t
CE
t
OE
t
WPH
t
DS
t
DH
DQ
7
PD
A
0H
D
OUT
D
OUT
WE
XXXH
PA
PA
t
OH
Data Polling
3rd Bus Cycle
t
AS
t
AH
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