![](http://datasheet.mmic.net.cn/330000/MBM29F160BE-55PFTN_datasheet_16438796/MBM29F160BE-55PFTN_19.png)
MBM29F160TE
-55/-70/-90
/MBM29F160BE
-55/-70/-90
19
which is the same as the regular Program operation. Note that DQ
7
must be read from the Program address
while DQ
6
can be read from any address.
To resume the operation of Sector Erase, the Resume command (30H) should be written. Any further writes of
the Resume command at this point will be ignored. Another Erase Suspend command can be written after the
chip has resumed erasing.
Extended Command
(1) Fast Mode
MBM29F160TE/BE has Fast Mode function. This mode dispenses with the initial two unlock cycles required
in the standard program command sequence writing Fast Mode command into the command register. In
this mode, the required bus cycle for programming is two cycles instead of four bus cycles in standard
program command. (Do not write erase command in this mode.) The read operation is also executed after
exiting this mode. To exit this mode, it is necessary to write Fast Mode Reset command into the command
register. (Refer to the Figure 25 Extended algorithm.) The V
CC
active current is required even CE = V
IH
during
Fast Mode.
(2) Fast Programming
During Fast Mode, the programming can be executed with two bus cycles operation. The Embedded Program
Algorithm is executed by writing program set-up command (A0H) and data write cycles (PA/PD). (Refer to
the Figure 25 Extended algorithm.)
(3) CFI (Common Flash Memory Interface)
The CFI (Common Flash Memory Interface) specification outlines device and host system software
interrogation handshake which allows specific vendor-specified software algorithms to be used for entire
families of devices. This allows device-independent, JEDEC ID-independent, and forward-and backward-
compatible software support for the specified flash device families. Refer to CFI specification in detail.
The operation is initiated by writing the query command (98H) into the command register. Following the
command write, a read cycle from specific address retrives device information. Please note that output data
of upper byte (DQ
8
to DQ
15
) is “0” in word mode (16 bit) read. Refer to the CFI code table. To terminate
operation, it is necessary to write the read/reset command sequence into the register.
Write Operation Status
Notes: 1. Performing successive read operations from any address will cause DQ
6
to toggle.
2. Reading the byte address being programmed while in the erase-suspend program mode will indicate logic “1” at
the DQ
2
bit. However, successive reads from the erase-suspended sector will cause DQ
2
to toggle.
Table 9 Hardware Sequence Flags
Status
DQ
7
DQ
6
DQ
5
DQ
3
DQ
2
In
Progress
Embedded Program Algorithm
DQ
7
Toggle
0
0
1
Embedded/Erase Algorithm
0
Toggle
0
1
Toggle
Erase
Suspend
Mode
Erase Suspend Read
(Erase Suspended Sector)
1
1
0
0
Toggle
Erase Suspend Read
(Non-Erase Suspended Sector)
Data
Data
Data
Data
Data
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ
7
Toggle
(Note 1)
0
0
1
(Note 2)
Exceeded
Time Limits
Embedded Program Algorithm
DQ
7
Toggle
1
0
1
Embedded/Erase Algorithm
0
Toggle
1
1
N/A
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ
7
Toggle
1
0
N/A