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參數(shù)資料
| 型號(hào)： | MBM29F160TE-70TN |
| 廠商： | FUJITSU LTD |
| 元件分類： | DRAM |
| 英文描述： | 16M (2M X 8/1M X 16) BIT |
| 中文描述： | 2M X 8 FLASH 5V PROM, 70 ns, PDSO48 |
| 封裝： | PLASTIC, TSOP1-48 |
| 文件頁(yè)數(shù)： | 23/53頁(yè) |
| 文件大小： | 251K |
| 代理商： | MBM29F160TE-70TN |
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MBM29F160TE
-55/-70/-90
/MBM29F160BE
-55/-70/-90
23
If the Embedded Erase Algorithm is interrupted, there is possibility that the erasing sector(s) will need to be
erased again prior to programming.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE, CE, or WE will not change the command registers.
Logical Inhibit
Writing is inhibited by holding any one of OE = V
IL
, CE = V
IH
, or WE = V
IH
. To initiate a write, CE and WE must
be a logical zero while OE is a logical one.
Power-up Write Inhibit
Power-up of the devices with WE = CE = V
IL
and OE = V
IH
will not accept commands on the rising edge of WE.
The internal state machine is automatically reset to read mode on power-up.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MBM29F160TE-70TR | 16M (2M X 8/1M X 16) BIT |
| MBM29F160TE-90PFTN | 16M (2M X 8/1M X 16) BIT |
| MBM29F160TE-90PFTR | 16M (2M X 8/1M X 16) BIT |
| MBM29F160TE-90TN | 16M (2M X 8/1M X 16) BIT |
| MBM29F160TE-90TR | 16M (2M X 8/1M X 16) BIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29F160TE70TN# | 制造商:FUJITSU 功能描述: |
| MBM29F160TE-70TN-LE1 | 制造商:Fujitsu 功能描述: |
| MBM29F160TE70TR | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 16M (2M X 8/1M X 16) BIT |
| MBM29F160TE-70TR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16M (2M X 8/1M X 16) BIT |
| MBM29F160TE-90 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16M (2M X 8/1M X 16) BIT |
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