參數(shù)資料
型號(hào)： MBM29LV320TE90
廠商： Fujitsu Limited
英文描述： 32 M (4 M X 8/2 M X 16) BIT
中文描述： 32 M（下4米8月2日的MX 16）位
文件頁(yè)數(shù)： 26/64頁(yè)
文件大?。?/td> 877K
代理商： MBM29LV320TE90
MBM29LV320TE/BE
80/90/10
26
I
COMMAND DEFINITIONS
The device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in the improper sequence will reset the device to the
read mode. “MBM29LV320TE/BE Command Definitions Table” in
I
DEVICE BUS OPERATIONS defines the
valid register command sequences. Note that the Erase Suspend (B0h) and Erase Resume (30h) commands
are valid only while the Sector Erase operation is in progress. Moreover both Read/Reset commands are
functionally equivalent, resetting the device to the read mode. Please note that commands are always written
at DQ
7
to DQ
0
and DQ
15
to DQ
8
bits are ignored.
1.
Read/Reset Command
In order to return from Autoselect mode or Exceeded Timing Limits (DQ
5
=
1) to Read/Reset mode, the Read/
Reset operation is initiated by writing the Read/Reset command sequence into the command register. Micro-
processor read cycles retrieve array data from the memory. The device remain enabled for reads until the
command register contents are altered.
The device will automatically power-up in the Read/Reset state. In this case, a command sequence is not required
to read data. Standard microprocessor read cycles will retrieve array data. This default value ensures that no
spurious alteration of the memory content occurs during the power transition. See “
I
AC CHARACTERISTICS”
for the specific timing parameters.
Autoselect Command
2.
Flash memories are intended for use in applications where the local CPU alters memory contents. As such,
manufacture and device codes must be accessible while the device resides in the target system. PROM pro-
grammers typically access the signature codes by raising A
9
to a high voltage. However, multiplexing high voltage
onto the address lines is not generally desired system design practice.
The device contains an Autoselect command operation to supplement traditional PROM programming method-
ology. The operation is initiated by writing the Autoselect command sequence into the command register.
Following the command write, a read cycle from address (XX) 00h retrieves the manufacture code of 04h. A
read cycle from address (XX) 01h for
×
16 ( (XX) 02h for
×
8) returns the device code. A read cycle from address
(XX) 03h for
×
16 ( (XX) 06h for
×
8) returns the extended device code. (See “MBM29LV320TE/BE Sector Group
Protection Verify Autoselect Codes Table” and “Expanded Autoselect Code Table” in
I
DEVICE BUS OPERA-
TIONS.)
The sector state (protection or unprotection) will be informed by address (XX) 02h for
×
16 ( (XX) 04h for
×
8) .
Scanning the sector group addresses (A
20
, A
19
, A
18
, A
17
, A
16
, A
15
, A
14
, A
13
, and A
12
) while (A
6
, A
1
, A
0
)
=
(0, 1, 0)
will produce a logical “1” at device output DQ
0
for a protected sector group. The programming verification should
be performed by verify sector group protection on the protected sector. (See “MBM29LV320TE/BE User Bus
Operations Tables (BYTE = V
IH
and BYTE = V
IL
)” in
I
DEVICE BUS OPERATIONS.)
To terminate the operation, it is necessary to write the Read/Reset command sequence into the register. To
execute the Autoselect command during the operation, writing Read/Reset command sequence must precede
the Autoselect command.
Byte/Word Programming
3.
The device is programmed on a byte-by-byte (or word-by-word) basis. Programming is a four bus cycle operation.
There are two “unlock” write cycles. These are followed by the program set-up command and data write cycles.
Addresses are latched on the falling edge of CE or WE, whichever happens later and the data is latched on the
rising edge of CE or WE, whichever happens first. The rising edge of CE or WE (whichever happens first) begins
programming. Upon executing the Embedded Program Algorithm command sequence, the system is not required
to provide further controls or timings. The device will automatically provide adequate internally generated pro-
gram pulses and verify the programmed cell margin.
The system can determine the status of the program operation by using DQ
7
(Data Polling) , DQ
6
(Toggle Bit) ,
or RY/BY. The Data Polling and Toggle Bit must be performed at the memory location which is being programmed.
相關(guān)PDF資料
PDF描述
MBM29LV320TE90PBT 32 M (4 M X 8/2 M X 16) BIT
MBM29LV320TE90TN 32 M (4 M X 8/2 M X 16) BIT
MBM29LV320BE80 32 M (4 M X 8/2 M X 16) BIT
MBM29LV320BE80PBT 32 M (4 M X 8/2 M X 16) BIT
MBM29LV320BE80TN 32 M (4 M X 8/2 M X 16) BIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MBM29LV320TE90PBT 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32 M (4 M X 8/2 M X 16) BIT
MBM29LV320TE-90PFTN 制造商:FUJITSU 功能描述:
MBM29LV320TE90TN 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32 M (4 M X 8/2 M X 16) BIT
MBM29LV320TE-90TN 制造商:Fuji Electric 功能描述:
MBM29LV320TE90TR 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32 M (4 M X 8/2 M X 16) BIT
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