- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383558 > MC-4R512FKE8D (Elpida Memory, Inc.) Direct Rambus DRAM RIMM Module 512M-BYTE (256M-WORD x 18-BIT) PDF資料下載
參數(shù)資料
| 型號： | MC-4R512FKE8D |
| 廠商： | Elpida Memory, Inc. |
| 英文描述： | Direct Rambus DRAM RIMM Module 512M-BYTE (256M-WORD x 18-BIT) |
| 中文描述： | RIMM的直接Rambus的內(nèi)存模塊512兆字節(jié)（256M字× 18位） |
| 文件頁數(shù)： | 9/14頁 |
| 文件大小： | 132K |
| 代理商： | MC-4R512FKE8D |
Data Sheet
E0076N20 (Ver 2.0)
9
MC-4R512FKE8D
AC Electrical Specifications
Symbol
Parameter and Conditions
MIN.
TYP.
MAX.
Unit
Z
Module Impedance of RSL signals
25.2
28.0
30.8
Module Impedance of SCK and CMD signals
23.8
28.0
32.2
T
PD
Average clock delay from finger to finger of all RSL clock nets
2.11
ns
(CTM, CTMN,CFM, and CFMN)
T
PD
Propagation delay variation of RSL signals with respect to TPD
Note1,2
24
+24
ps
T
PD-CMOS
Propagation delay variation of SCK signal with respect to an average clock
delay
Note1
250
+250
ps
T
PD- SCK,CMD
Propagation delay variation of CMD signal with respect to SCK signal
200
+2
0
0
ps
V
α
/V
IN
Attenuation Limit
-845
25.0
%
-745
25.0
-653
18.5
V
XF
/V
IN
Forward crosstalk coefficient
-845
8.0
%
(300ps input rise time 20% - 80%)
-745
8.0
-653
8.0
V
XB
/V
IN
Backward
crosstalk coefficient
-845
2.5
%
(300ps input rise time 20% - 80%)
-745
2.5
-653
2.5
R
DC
DC Resistance Limit
-845
1.2
-745
1.2
-653
1.2
Notes 1.
T
PD
or Average clock delay is defined as the average delay from finger to finger of all RSL clock nets (CTM,
CTMN, CFM, and CFMN).
2.
If the RIMM module meets the following specification, then it is compliant to the specification.
If the RIMM module does not meet these specifications, then the specification can be adjusted by the
“Adjusted
T
PD
Specification” table.
Adjusted
T
PD
Specification
Symbol
Parameter and conditions
Adjusted MIN./MAX.
Absolute
Unit
MIN.
MAX.
T
PD
Propagation delay variation of RSL signals with respect to T
PD
+/
[24+(18*N*
Z0)]
Note
50
50
ps
Note
N = Number of RDRAM devices installed on the RIMM module.
Z0 = delta Z0
%
= (MAX. Z0
MIN. Z0) / (MIN. Z0)
(MAX. Z0 and MIN. Z0 are obtained from the loaded (high impedance) impedance coupons of all RSL layers
on the module.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC-4R512FKE8D-653 | Direct Rambus DRAM RIMM Module 512M-BYTE (256M-WORD x 18-BIT) |
| MC-4R512FKE8D-745 | Direct Rambus DRAM RIMM Module 512M-BYTE (256M-WORD x 18-BIT) |
| MC-4R64CEE6B | Process/Temperature Controller; Control Operation:Auto/Manual, Ramp/Soak, Stand By, Valve Positioning; Control Output Current:0.75 A; Control Output Relay Rating:264 VAC / 2 A; Control Type:On/Off, PID RoHS Compliant: NA |
| MC-4R64CEE6B-653 | Process/Temperature Controller; Control Operation:Auto/Manual, Ramp/Soak, Stand By, Valve Positioning; Control Output Current:0-20 mA; Control Output Relay Rating:264 VAC / 2 A; Control Type:On/Off, PID RoHS Compliant: NA |
| MC-4R64CEE6B-745 | Process/Temperature Controller; Control Operation:Auto/Manual, Ramp/Soak, Stand By, Valve Positioning; Control Output Current:0-20 mA; Control Output Relay Rating:264 VAC / 2 A; Control Type:On/Off, PID RoHS Compliant: NA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC-4R512FKE8D-653 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:Direct Rambus DRAM RIMM Module 512M-BYTE (256M-WORD x 18-BIT) |
| MC-4R512FKE8D-745 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:Direct Rambus DRAM RIMM Module 512M-BYTE (256M-WORD x 18-BIT) |
| MC-4R512FKE8D-840 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:Direct Rambus DRAM RIMM Module 512M-BYTE (256M-WORD x 18-BIT) |
| MC-4R512FKE8D-845 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:Direct Rambus DRAM RIMM Module 512M-BYTE (256M-WORD x 18-BIT) |
| MC-4R512FKK6K | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512MB 32-bit Direct Rambus DRAM RIMM Module |
發(fā)布緊急采購，3分鐘左右您將得到回復。