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參數(shù)資料
| 型號： | MC100E446FNR2 |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 12/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONV 4BIT SER/PAR ECL 28-PLCC |
| 產(chǎn)品變化通告： | Reactivation Notice 26/Apr/2011 Product Obsolescence 08/Apr/2011 |
| 標準包裝： | 500 |
| 應(yīng)用： | 數(shù)據(jù)管理 |
| 接口： | 差分 |
| 電源電壓： | 4.2 V ~ 5.7 V |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 帶卷 (TR) |
| 安裝類型： | 表面貼裝 |
MC10E446, MC100E446
http://onsemi.com
9
Applications Information
The MC10E/100E446 is an integrated 4:1 parallel to serial
converter. The chip is designed to work with the E445 device
to provide both transmission and receiving of a high speed
serial data path. The E446 can convert 4 bits of data into a
1.3 Gb/s NRZ data stream. The device features a SYNC
input which allows the user to reset the internal clock
circuitry
and
restart
the
conversion
sequence
(see timing diagram A).
The E446 features a differential serial input and internal
divide by 8 circuitry to facilitate the cascading of two
devices to build a 8:1 multiplexer. Figure 1 illustrates the
architecture for a 8:1 multiplexer using two E446’s; the
timing diagram for this configuration can be found on the
following page. Notice the serial outputs (SOUT) of the
higher order converter feed the serial inputs of the the lower
order device. This feed through of the serial inputs bounds
the upper end of the frequency of operation. The clock to
serial output propagation delay plus the setup time of the
serial input pins must fit into a single clock period for the
cascade architecture to function properly. Using the worst
case values for these two parameters from the data sheet,
TPD CLK to SOUT = 1480 ps and tS for SIN = 200 ps,
yields a minimum period of 1280 ps or a clock frequency of
780 MHz.
The clock frequency is somewhat lower than that of a
single converter, to increase this frequency some games can
be played with the clock input of the higher order E446. By
delaying the clock feeding E446A relative to the clock of
E446B the frequency of operation can be increased.
Q3
Q7
Q2
Q6
Q1
Q5
Q0
Q4
SOUT
E446B
Q3
Q2
Q1
Q0
SIN
E446A
CLK
1000ps
1600ps
600ps
CLOCK
Tpd CLK
to SOUT
Figure 5. Cascaded 8:1 Converter Architecture
SOUT
1000ps
Serial
Data
Parallel Data
MSB
LSB
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC100E446FNR2G | 功能描述:計數(shù)器移位寄存器 5V ECL 4-Bit Serial to Parallel CNVRTR RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC100E451 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:6-BIT D REGISTER DIFFERENTIAL DATA AND CLOCK |
| MC100E451FN | 功能描述:觸發(fā)器 5V ECL 6-Bit Diff RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC100E451FNG | 功能描述:觸發(fā)器 5V ECL 6-Bit Diff Data / Clock RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC100E451FNR2 | 功能描述:觸發(fā)器 5V ECL 6-Bit Diff RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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