參數(shù)資料
型號(hào): MC100EP016AFA
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: 3.3 V ECL 8-Bit Synchronous Binary Up Counter
中文描述: 100E SERIES, SYN POSITIVE EDGE TRIGGERED 8-BIT UP BINARY COUNTER, PQFP32
封裝: LQFP-32
文件頁(yè)數(shù): 6/12頁(yè)
文件大?。?/td> 98K
代理商: MC100EP016AFA
MC100EP016A
http://onsemi.com
6
AC CHARACTERISTICS
V
EE
= 3.0 V to 3.6 V; V
CC =
0 V or V
CC
= 3.0 V to 3.6 V; V
EE
= 0 V (Note 8)
40
°
C
25
°
C
70
°
C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
f
COUNT
Maximum Frequency
Count & Division Modes
Q, TC, COUT/COUT
1.3
1.5
1.2
1.4
1.2
1.3
GHz
t
PLH
t
PHL
Propagation Delay
CLK to Q
MR to Q
CLK to TC
MR to TC
CLK to COUT/COUT
MR to COUT/COUT
350
400
350
400
475
450
511
550
511
555
705
720
650
700
650
700
850
850
400
400
400
400
500
500
550
570
550
570
745
760
700
750
700
750
900
900
480
450
480
520
550
570
610
630
610
635
825
830
780
820
780
820
1000
950
ps
t
S
Setup Time
P0
P1 to P4
P5 to P7
CE
PE
TCLD
400
300
250
500
500
550
240
140
80
320
315
355
400
300
250
500
500
550
240
135
65
330
320
365
400
300
250
500
500
550
245
125
55
340
325
380
ps
t
H
Hold Time
P0
P1 to P4
P5 to P7
CE
PE
TCLD
100
50
150
600
625
525
145
160
105
380
465
320
100
50
150
600
625
525
155
170
110
410
500
325
100
50
150
600
625
525
170
180
115
450
535
340
ps
t
JITTER
Clock Random Jitter
(RMS, 1000 Waveforms)
2.6
8.5
2.5
8.0
2.5
8.0
ps
t
RR
Reset Recovery Time
400
195
400
205
400
220
ps
t
PW
Minimum Pulse Width CLK
Minimum Pulse Width MR
550
550
365
380
550
550
365
380
550
550
370
380
ps
t
r
, t
f
Output Rise/Fall Times
20% 80%
90
180
320
100
190
320
125
215
450
ps
8. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 ohms to V
CC
2.0 V.
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