參數(shù)資料
型號(hào): MC100EP105FAR2G
廠商: ON Semiconductor
文件頁(yè)數(shù): 1/11頁(yè)
文件大?。?/td> 0K
描述: IC GATE AND/NAND QUAD 2IN 32LQFP
標(biāo)準(zhǔn)包裝: 2,000
系列: 100EP
邏輯類型: 與/與非門
電路數(shù): 4
輸入數(shù): 8 輸入(2,2,2,2)
施密特觸發(fā)器輸入: 無(wú)
輸出類型: 差分
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-LQFP(7x7)
包裝: 帶卷 (TR)
其它名稱: MC100EP105FAR2GOS
Semiconductor Components Industries, LLC, 2006
November, 2006 Rev. 11
1
Publication Order Number:
MC10EP105/D
MC10EP105, MC100EP105
3.3V / 5VECL Quad 2Input
Differential AND/NAND
Description
The MC10/100EP105 is a quad 2input differential AND/NAND
gate. Each gate is functionally equivalent to the EP05 and LVEL05
devices. With AC performance much faster than the LVEL05 device,
the EP105 is ideal for applications requiring the fastest AC
performance available.
The 100 Series contains temperature compensation.
Features
275 ps Typical Propagation Delay
Maximum Frequency > 3 GHz Typical
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = 3.0 V to 5.5 V
Open Input Default State
Safety Clamp on Inputs
PbFree Packages are Available*
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
LQFP32
FA SUFFIX
CASE 873A
MARKING
DIAGRAMS*
*For additional marking information, refer to
Application Note AND8002/D.
http://onsemi.com
MCxxx
EP105
AWLYYWWG
xxx
= 10 or 100
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G = PbFree Package
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
ORDERING INFORMATION
QFN32
MN SUFFIX
CASE 488AM
32
1
MCxxx
EP105
AWLYYWWG
G
1
(Note: Microdot may be in either location)
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