參數(shù)資料
型號: MC100EP142FAR2
廠商: ON Semiconductor
文件頁數(shù): 6/13頁
文件大?。?/td> 0K
描述: IC REGISTER SHFT 9BIT ECL 32LQFP
產(chǎn)品變化通告: Product Discontinuation 20/Aug/2008
標(biāo)準(zhǔn)包裝: 1
系列: 100EP
邏輯類型: 移位寄存器
輸出類型: 標(biāo)準(zhǔn)
元件數(shù): 1
每個元件的位元數(shù): 9
功能: 通用
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-LQFP(7x7)
包裝: 剪切帶 (CT)
其它名稱: MC100EP142FAROSCT
MC10EP142, MC100EP142
http://onsemi.com
2
Figure 1. Pinout: LQFP32 (Top View)
25
26
27
28
29
30
31
32
15
14
13
12
11
10
9
1234567
8
24
23
22
21
20
19
18
17
16
D7
D8
Q7
Q4
Q2
VCC
MR
Q0
CLK0
D6
Q3
Q1
VEE
SEL
CLK0
CLK1
VCC
S
IN
MC10EP142
MC100EP142
S
IN
VEE
D0
D1
D2
D3
Q8
Q7
Q6
V
CC
Q5
D4
D5
Figure 2. Pinout: QFN32 (Top View)
32
31
30
29
28
27
26
25
9
10
11
12
13
14
15
16
1
234
5
6
78
24
23
22
21
20
19
18
17
Exposed Pad (EP)
D7
D8
Q7
Q4
Q2
VCC
MR
Q0
CLK0
D6
Q3
Q1
VEE
SEL
CLK0
CLK1
VCC
S
IN
S
IN
VEE
D0
D1
D2
D3
Q8
Q7
Q6
V
CC
Q5
D4
D5
Table 1. PIN DESCRIPTION
Pin
Name
I/O
Default State
Description
1,23,24,25,26,
27,29,30,31
D[0:8]
ECL Input
Low
SingleEnded Parallel Data Inputs [0:8]. Internal 75 kW to VEE.
2
SIN
ECL Input
Low
Noninverted Differential Serial Input. Internal 75 kW to VEE.
3
SIN
ECL Input
High
Inverted Differential Serial Input. Internal 75 kW to VEE and 36.5 kW to
VCC.
4
CLK0
ECL Input
Low
Noninverted Differential CLK0 Input. Internal 75 kW to VEE.
5
CLK0
ECL Input
High
Inverted Differential CLK0B Input. Internal 75 kW to VEE and 36.5 kW
to VCC.
6
CLK1
ECL Input
Low
Noninverted Differential CLK1 Input. Internal 75 kW to VEE.
7
CLK1
ECL Input
High
Inverted Differential CLK1B Input. Internal 75 kW to VEE and 36.5 kW
to VCC.
8
SEL
ECL Input
Low
SingleEnded Select Logic Input. Internal 75 kW to VEE.
9
MR
ECL Input
Low
SingleEnded Master Reset Logic Input. Internal 75 kW to VEE.
10,11,12,14,1
5,18,19,22
Q0,Q1,Q2,Q3,
Q4,Q5,Q6,Q8
ECL Output
SingleEnded parallel Data outputs [0,1,2,3,4,5,6,8]. Typically
Terminated with 50 W to VTT = VCC 2 V.
13,17,32
VCC
Positive supply Voltage. All VCC Pins must be Externally Connected to
Power Supply to Guarantee Proper Operation.
16,28
VEE
Negative supply Voltage. All VEE Pins must be Externally connected
to Power Supply to Guarantee Proper Operation.
20
Q7
ECL Output
Noninverted Differential parallel/Serial Data Output 7. Typically
Terminated with 50 W to VTT = VCC 2 V.
21
Q7
ECL Output
Inverted Differential parallel/Serial Data Output 7. Typically
Terminated with 50 W to VTT = VCC 2 V.
1. All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.
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