MC10EP16T, MC100EP16T
http://onsemi.com
2
1
2
3
45
6
7
8
Q
VEE
VCC
Figure 1. 8Lead Pinout (Top View) and Logic Diagram
D
Q
D
VT
D, D
ECL Data Inputs
Q, Q
ECL Data Outputs
VCC
Positive Supply
VEE
Negative Supply
VT
50 W Termination Resistor to D
VT
50 W Termination Resistor to D
EP
Table 1. PIN DESCRIPTION
50 W
PIN
FUNCTION
(DFN8 only) Thermal exposed pad
must be connected to a sufficient
thermal conduit. Electrically con-
nect to the most negative supply
(GND) or leave unconnected,
floating open.
Table 2. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
N/A
Internal Input Pullup Resistor
N/A
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 200 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note
1)Pb Pkg
PbFree Pkg
SOIC8
TSSOP8
DFN8
Level 1
Level 3
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V0 @ 0.125 in
Transistor Count
167 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.