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參數(shù)資料
| 型號(hào)： | MC100EP52DTG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FLIP FLOP ECL DATA/CLK 8TSSOP |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 系列： | 100EP |
| 功能： | 標(biāo)準(zhǔn) |
| 類型： | D 型 |
| 輸出類型： | 差分 |
| 元件數(shù)： | 1 |
| 每個(gè)元件的位元數(shù)： | 1 |
| 頻率 - 時(shí)鐘： | 3GHz |
| 延遲時(shí)間 - 傳輸： | 330ps |
| 觸發(fā)器類型： | 正邊沿 |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 包裝： | 管件 |
| 其它名稱： | MC100EP52DTGOS |
Semiconductor Components Industries, LLC, 2008
August, 2008 Rev. 7
1
Publication Order Number:
MC10EP52/D
MC10EP52, MC100EP52
3.3V / 5VECL Differential
Data and Clock D Flip-Flop
Description
The MC10EP/100EP52 is a differential data, differential clock D
flipflop. The device is pin and functionally equivalent to the EL52
device.
Data enters the master portion of the flipflop when the clock is
LOW and is transferred to the slave, and thus the outputs, upon a
positive transition of the clock. The differential clock inputs of the
EP52 allow the device to also be used as a negative edge triggered
device.
The EP52 employs input clamping circuitry so that under open input
conditions (pulled down to VEE) the outputs of the device will remain
stable.
The 100 Series contains temperature compensation.
Features
330 ps Typical Propagation Delay
Maximum Frequency u 4 GHz Typical
PECL Mode: VCC = 3.0 V to 5.5 V with VEE = 0 V
NECL Mode: VCC = 0 V with VEE = 3.0 V to 5.5 V
Open Input Default State
Safety Clamp on Inputs
Q Output Will Default LOW with Inputs Open or at VEE
PbFree Packages are Available
*For additional marking information, refer to
Application Note AND8002/D.
H
= MC10
A = Assembly Location
K
= MC100 L
= Wafer Lot
5T
= MC10
Y = Year
3O = MC100 W = Work Week
M = Date Code
G
= PbFree Package
(Note: Microdot may be in either location)
ALYWG
G
HP52
ALYWG
G
KP52
MARKING
DIAGRAMS*
SOIC8
D SUFFIX
CASE 751
TSSOP8
DT SUFFIX
CASE 948R
1
8
1
8
1
8
http://onsemi.com
1
8
HEP52
ALYW
G
1
8
KEP52
ALYW
G
1
8
DFN8
MN SUFFIX
CASE 506AA
5T
M
G
14
3OM
G
14
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V150A5M400BG3 | CONVERTER MOD DC/DC 5V 400W |
| MC10EP52DTG | IC FLIP FLOP ECL DIFF CLK 8TSSOP |
| MC100LVEL51DG | IC FLIP FLOP CLK ECL 3.3V 8SOIC |
| V150A5M400BG2 | CONVERTER MOD DC/DC 5V 400W |
| MC10EL31DG | IC FLIP FLOP ECL SET/RESET 8SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC100EP52DTG | 制造商:ON Semiconductor 功能描述:Flip Flop Logic IC |
| MC100EP52DTR2 | 功能描述:觸發(fā)器 3.3V/5V ECL D-Type RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC100EP52DTR2G | 功能描述:觸發(fā)器 3.3V/5V ECL D-Type w/Diff Data and Clk RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC100EP52MNR4 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC100EP52MNR4G | 功能描述:觸發(fā)器 BBG ECL FL FLOP DIFF RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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