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參數(shù)資料
| 型號(hào)： | MC10136FN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Universal Hexadecimal Counter |
| 中文描述： | 10K SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PQCC20 |
| 封裝： | PLASTIC, LCC-20 |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大小： | 150K |
| 代理商： | MC10136FN |
MC10136
MOTOROLA
MECL Data
DL122 — Rev 6
3–32
FIGURE 1 — 12 BIT SYNCHRONOUS COUNTER
FIGURE 2 — 300 MHz PRESCALER
FIGURE 3 — 50 MHz PROGRAMMABLE COUNTER
FIGURE 4 — 100 MHz PROGRAMMABLE COUNTER
APPLICATIONS INFORMATION
To provide more than four bits of counting capability
several MC10136 counters may be cascaded. The Carry
In input overrides the clock when the counter is either in
the increment mode or the decrement mode of operation.
This input allows several devices to be cascaded in a fully
synchronous multistage counter as illustrated in Figure 1.
The carry is advanced between stages as shown with no
external gating. The Carry In of the first device may be left
open. The system clock is common to all devices.
The various operational modes of the counter make it
useful for a wide variety of applications. If used with MECL
III devices, prescalers with input toggle frequencies in
excess of 300 MHz are possible. Figure 2 shows such a
prescaler using the MC10136 and MC1670. Use of the
MC10231 in place of the MC1670 permits 200 MHz
operation.
The MC10136 may also be used as a programmable
counter. The configuration of Figure 3 requires no
additional gates, although maximum frequency is limited
to about 50 MHz. The divider modulus is equal to the
program input plus one (M = N + 1), therefore, the counter
will divide by a modulus varying from 1 to 16.
A second programmable configuration is also illustrated
in Figure 4. A pulse swallowing technique is used to speed
the counter operation up to 110 MHz typically. The divider
modulus for this figure is equal to the program input (M =
N). The minimum modulus is 2 because of the pulse
swallowing technique, and the modulus may vary from 2
to 15. This programmable configuration requires an
additional gate, such as 1/2MC10109 and a flip-flop such
as 1/2MC10131.
D
Q
C
Q
Input
Frequency
NOTE: S1 and S2 are set either for increment or decrement operation.
1
fout =
fmax
50 MHz Typ.
Divide Ratio is from 1 to 16.
fin
Program Input + 1
2
3
System
Clock
C
Q0 Q1 Q2
Cin
Q3
Cout
LSB
Logic High
MC10136
S1
S2
C
Q3
D
Q
C
Q
MC1670
Input Frequency
32
fin
fout
Q0 Q2
Q3
Cout
Cin
S1
D0
D1
D3
D2
C
Program Input
1/2MC10109
1/2MC10131
C
Q0 Q1 Q2
Cin
Q3
Cout
C
Q0 Q1 Q2
Cin
Q3
MSB
1
fout =
fmax
110 MHz Typ.
Divide Ratio is from 2 to 15.
fin
Program Input
2
3
fin
D0
D1
D3
D2
C
S2
S1
Program Input
MC10136
fout
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC10136 | Universal Hexadecimal Counter |
| MC10136L | 9-Bit Odd/Even Parity Generators/Checkers 14-CDIP -55 to 125 |
| MC10136P | Universal Hexadecimal Counter |
| MC10137L | Replaced by CD54HCT191 : Synchronous Up/Down Counters With Down/Up Mode Control 16-CDIP -55 to 125 |
| MC10137 | Universal Decade Counter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC10136FN WAF | 制造商:ON Semiconductor 功能描述: |
| MC10136FNR2 | 制造商:Motorola Inc 功能描述: |
| MC10136L | 制造商:ON Semiconductor 功能描述:Counter Single 4-Bit Hexadecimal UP/Down 16-Pin CDIP Rail 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10136P | 制造商:ON Semiconductor 功能描述:Counter Single 4-Bit Hexadecimal UP/Down 16-Pin PDIP Rail 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10137L | 制造商:Motorola Inc 功能描述: |
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