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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� MC10EP31DTR2
寤犲晢锛� ON Semiconductor
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 4/11闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FLIP FLOP ECL SET/RST 8-TSSOP
鐢�(ch菐n)鍝佽畩鍖栭€氬憡锛� Product Discontinuation 20/Aug/2008
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 2,500
绯诲垪锛� 10EP
鍔熻兘锛� 瑷�(sh猫)缃紙闋�(y霉)瑷�(sh猫)锛夊拰寰�(f霉)浣�
椤炲瀷锛� D 鍨�
杓稿嚭椤炲瀷锛� 宸垎
鍏冧欢鏁�(sh霉)锛� 1
姣忓€�(g猫)鍏冧欢鐨勪綅鍏冩暩(sh霉)锛� 1
闋荤巼 - 鏅�(sh铆)閻橈細 3GHz
寤堕伈鏅�(sh铆)闁� - 鍌宠几锛� 340ps
瑙哥櫦(f膩)鍣ㄩ鍨嬶細 姝ｉ倞娌�
闆绘簮闆诲锛� 3 V ~ 5.5 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級
鍖呰锛� 甯跺嵎 (TR)
MC10EP31, MC100EP31
http://onsemi.com
2
1
2
3
45
6
7
8
Q
VEE
VCC
Figure 1. 8Lead Pinout (Top View) and
Logic Diagram
D
Q
CLK
RESET
SET
S
D
R
Flip Flop
Table 1. PIN DESCRIPTION
Pin
Function
CLK*
ECL Clock Inputs
Reset*
ECL Asynchronous Reset
Set*
ECL Asynchronous Set
D*
ECL Data Input
Q, Q
ECL Data Outputs
VCC
Positive Supply
VEE
Negative Supply
EP
(DFN8 only) Thermal exposed pad must
be connected to a sufficient thermal con-
duit. Electrically connect to the most neg-
ative supply (GND) or leave unconnec-
ted, floating open.
*Pins will default LOW when left open.
Table 2. TRUTH TABLE
D
SET
RESET
CLK
Q
L
H
X
L
H
L
H
L
H
Z
X
L
H
L
UNDEF
Z = LOW to HIGH Transition
Table 3. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
N/A
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 200 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Pb Pkg
PbFree Pkg
SOIC8
TSSOP8
DFN8
Level 1
Level 3
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V0 @ 0.125 in
Transistor Count
75 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
MC10EP31DTR2G 鍔熻兘鎻忚堪:瑙哥櫦(f膩)鍣� 3.3V/5V ECL D-Type w/Set and Reset RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闆昏矾鏁�(sh霉)閲�:2 閭忚集绯诲垪:SN74 閭忚集椤炲瀷:D-Type Flip-Flop 妤垫€�:Inverting, Non-Inverting 杓稿叆椤炲瀷:CMOS 杓稿嚭椤炲瀷: 鍌虫挱寤堕伈鏅�(sh铆)闁�:4.4 ns 楂橀浕骞宠几鍑洪浕娴�:- 16 mA 浣庨浕骞宠几鍑洪浕娴�:16 mA 闆绘簮闆诲-鏈€澶�:5.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:X2SON-8 灏佽:Reel
MC10EP31MNR4G 鍔熻兘鎻忚堪:瑙哥櫦(f膩)鍣� BBG ECL FLIP FLOP DUAL RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闆昏矾鏁�(sh霉)閲�:2 閭忚集绯诲垪:SN74 閭忚集椤炲瀷:D-Type Flip-Flop 妤垫€�:Inverting, Non-Inverting 杓稿叆椤炲瀷:CMOS 杓稿嚭椤炲瀷: 鍌虫挱寤堕伈鏅�(sh铆)闁�:4.4 ns 楂橀浕骞宠几鍑洪浕娴�:- 16 mA 浣庨浕骞宠几鍑洪浕娴�:16 mA 闆绘簮闆诲-鏈€澶�:5.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:X2SON-8 灏佽:Reel
MC10EP32D 鍔熻兘鎻忚堪:澧炴晥鍣�/鍒嗛牷鍣� 3.3V/5V ECL Divide RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鐢�(ch菐n)鍝�:Multiplier 閭忚集绯诲垪: 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�:- 40 C 瀹夎棰�(f膿ng)鏍�:Through Hole 灏佽 / 绠遍珨:PDIP-14
MC10EP32DG 鍔熻兘鎻忚堪:澧炴晥鍣�/鍒嗛牷鍣� 3.3V/5V ECL Divide By 2 Divider RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鐢�(ch菐n)鍝�:Multiplier 閭忚集绯诲垪: 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�:- 40 C 瀹夎棰�(f膿ng)鏍�:Through Hole 灏佽 / 绠遍珨:PDIP-14
MC10EP32DR2 鍔熻兘鎻忚堪:澧炴晥鍣�/鍒嗛牷鍣� 3.3V/5V ECL Divide RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鐢�(ch菐n)鍝�:Multiplier 閭忚集绯诲垪: 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�:- 40 C 瀹夎棰�(f膿ng)鏍�:Through Hole 灏佽 / 绠遍珨:PDIP-14
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娣诲姞鏇村閲囪臣(g貌u)

鎴戠殑鑱�(li谩n)绯绘柟寮�

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