參數(shù)資料
型號： MC10EP56DW
廠商： ON SEMICONDUCTOR
元件分類： 編、解碼器及復(fù)用、解復(fù)用
英文描述： 10E SERIES, DUAL 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO20
封裝： PLASTIC, SOIC-20
文件頁數(shù)： 9/12頁
文件大小： 89K
代理商： MC10EP56DW
MC10EP56, MC100EP56
http://onsemi.com
6
100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = –5.5 V to –3.0 V (Note 18.)
–40
°C
25
°C
85
°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
50
61
75
50
63
77
55
66
80
mA
VOH
Output HIGH Voltage (Note 19.)
–1145
–1020
–895
–1145
–1020
–895
–1145
–1020
–895
mV
VOL
Output LOW Voltage (Note 19.)
–1945
–1820
–1695
–1945
–1820
–1695
–1945
–1820
–1695
mV
VIH
Input HIGH Voltage (Single Ended)
–1225
–880
–1225
–880
–1225
–880
mV
VIL
Input LOW Voltage (Single Ended)
–1945
–1625
–1945
–1625
–1945
–1625
mV
VBB
Output Voltage Reference
–1525
–1425
–1325
–1525
–1425
–1325
–1525
–1425
–1325
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 20.)
VEE+2.0
0.0
VEE+2.0
0.0
VEE+2.0
0.0
V
IIH
Input HIGH Current
150
A
IIL
Input LOW Current SEL, COM_SEL, D
D
0.5
–150
0.5
–150
0.5
–150
A
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.
18. Input and output parameters vary 1:1 with VCC.
19. All loading with 50 ohms to VCC–2.0 volts.
20. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
AC CHARACTERISTICS VCC = 0 V; VEE = –3.0 V to –5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 21.)
–40
°C
25
°C
85
°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
fmax
Maximum Frequency
(See Figure 2. Fmax/JITTER)
> 3
GHz
tPLH,
tPHL
Propagation Delay to
Output Differential
D to Q, Q
SEL to Q, Q
COM_SEL to Q, Q
250
340
350
450
270
360
340
360
470
300
400
500
ps
tSKEW
Within–Device Skew (Note 22.)
Device to Device Skew
50
100
200
50
100
200
50
100
200
ps
tJITTER
Cycle–to–Cycle Jitter
(See Figure 2. Fmax/JITTER)
0.2
< 1
0.2
< 1
0.2
< 1
ps
VPP
Input Voltage Swing (Differential)
150
800
1200
150
800
1200
150
800
1200
mV
tr
tf
Output Rise/Fall Times
Q, Q
(20% – 80%)
70
120
170
80
130
180
100
150
230
ps
21. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 ohms to VCC–2.0 V.
22. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
are measured from the cross point of the inputs to the cross point of the outputs.
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