參數(shù)資料
型號: MC13135DW
廠商: MOTOROLA INC
元件分類: 接收器
英文描述: DUAL CONVERSION NARROWBAND FM RECEIVERS
中文描述: FM, AUDIO SINGLE CHIP RECEIVER, PDSO24
封裝: PLASTIC, SO-24
文件頁數(shù): 1/16頁
文件大?。?/td> 553K
代理商: MC13135DW
Operating
Temperature Range
DUAL CONVERSION
NARROWBAND
FM RECEIVERS
ORDERING INFORMATION
P SUFFIX
PLASTIC PACKAGE
CASE 724
Order this document by MC13135/D
DW SUFFIX
PLASTIC PACKAGE
CASE 751E
(SO–24L)
24
1
24
1
Device
Package
MC13135P
MC13135DW
TA = – 40
°
to +85
°
C
Plastic DIP
SO–24L
MC13136P
MC13136DW
Plastic DIP
SO–24L
1
MOTOROLA ANALOG IC DEVICE DATA
The MC13135/MC13136 are the second generation of single chip, dual
conversion FM communications receivers developed by Motorola. Major
improvements in signal handling, RSSI and first oscillator operation have
been made. In addition, recovered audio distortion and audio drive have
improved. Using Motorola’s MOSAIC
1.5 process, these receivers offer
low noise, high gain and stability over a wide operating voltage range.
Both the MC13135 and MC13136 include a Colpitts oscillator, VCO tuning
diode, low noise first and second mixer and LO, high gain limiting IF, and
RSSI. The MC13135 is designed for use with an LC quadrature detector and
has an uncommitted op amp that can be used either for an RSSI buffer or as
a data comparator. The MC13136 can be used with either a ceramic
discriminator or an LC quad coil and the op amp is internally connected for a
voltage buffered RSSI output.
These devices can be used as stand–alone VHF receivers or as the lower
IF of a triple conversion system. Applications include cordless telephones,
short range data links, walkie–talkies, low cost land mobile, amateur radio
receivers, baby monitors and scanners.
Complete Dual Conversion FM Receiver – Antenna to Audio Output
Input Frequency Range – 200 MHz
Voltage Buffered RSSI with 70 dB of Usable Range
Low Voltage Operation – 2.0 to 6.0 Vdc (2 Cell NiCad Supply)
Low Current Drain – 3.5 mA Typ
Low Impedance Audio Output < 25
VHF Colpitts First LO for Crystal or VCO Operation
Isolated Tuning Diode
Buffered First LO Output to Drive CMOS PLL Synthesizer
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24
AF
VCC2
2nd LO
VCC1
1st LO
Varicap
Limiter
Demod
1st LO Base
1st LO Emitter
1st LO Out
VCC1
2nd LO Emitter
2nd LO Base
2nd Mixer Out
VEE
Limiter In
Decouple 1
Decouple 2
RSSI
Varicap C
Varicap A
1st Mixer In 1
1st Mixer In 2
1st Mixer Out
VCC2
2nd Mixer In
Audio Out
Op Amp Out
Op Amp In –
Op Amp In +
Quad Coil
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24
AF
VCC2
2nd LO
VCC1
1st LO
Varicap
Limiter
Demod
1st LO Base
1st LO Emitter
1st LO Out
VCC1
2nd LO Emitter
2nd LO Base
2nd Mixer Out
VEE
Limiter In
Decouple 1
Decouple 2
RSSI
Varicap C
Varicap A
1st Mixer In 1
1st Mixer In 2
1st Mixer Out
VCC2
2nd Mixer In
Audio Out
Buffered RSSI Output
Op Amp In –
Limiter Output
Quad Input
MC13135
MC13136
PIN CONNECTIONS
Each device contains 142 active transistors.
Motorola, Inc. 1996
Rev 3
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