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參數(shù)資料
| 型號： | MC14018BCL |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Presettable Divide-By-N Counter |
| 中文描述： | 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 5-BIT UP RING COUNTER, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 225K |
| 代理商： | MC14018BCL |
MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
81
MC14018B
The MC14018B contains five Johnson counter stages which are
asynchronously presettable and resettable. The counters are synchronous,
and increment on the positive going edge of the clock.
Presetting is accomplished by a logic 1 on the preset enable input. Data on
the Jam inputs will then be transferred to their respective Q outputs
(inverted). A logic 1 on the reset input will cause all Q outputs to go to a logic
1 state.
Division by any number from 2 to 10 can be accomplished by connecting
appropriate Q outputs to the data input, as shown in the Function Selection
table. Anti–lock gating is included in the MC14018B to assure proper
counting sequence.
Fully Static Operation
Schmitt Trigger on Clock Input
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
MAXIMUM RATINGS*
Symbol
Parameter
DC Supply Voltage
Value
– 0.5 to + 18.0
Unit
V
Input or Output Voltage (DC or Transient)
±
10
V
Input or Output Current (DC or Transient),
per Pin
mA
PD
Tstg
TL
Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
Power Dissipation, per Package
500
mW
Storage Temperature
– 65 to + 150
C
Lead Temperature (8–Second Soldering)
260
C
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, Vin and
Vout should be constrained to the range VSS
≤
(Vin or Vout)
≤
VDD.
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.
SEMICONDUCTOR TECHNICAL DATA
REV 3
1/94
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
TA = – 55
°
to 125
°
C for all packages.
Plastic
Ceramic
SOIC
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
PIN ASSIGNMENT
FUNCTIONAL TRUTH TABLE
Preset
Enable
Jam
Input
Clock
Reset
Qn
0
0
0
0
1
0
0
1
1
X
X
X
0
1
X
Qn
Dn*
1
0
1
X
X
X
* Dn is the Data input for that stage. Stage 1
has Data brought out to Pin 1.
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
JAM 5
Q5
C
R
VDD
JAM 4
PE
Q4
Q2
JAM 2
JAM 1
Din
VSS
JAM 3
Q3
Q1
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| MC14018BCP | 功能描述:計數(shù)器移位寄存器 LOG CMOS COUNTER DIVIDE RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
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