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參數(shù)資料
| 型號(hào)： | MC14512BFEL |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | 4000/14000/40000 SERIES, 8 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16 |
| 封裝： | EIAJ, PLASTIC, SOIC-16 |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大?。?/td> | 211K |
| 代理商： | MC14512BFEL |
Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 3
1
Publication Order Number:
MC14512B/D
MC14512B
8-Channel Data Selector
The MC14512B is an 8–channel data selector constructed with
MOS P–channel and N–channel enhancement mode devices in a
single monolithic structure. This data selector finds primary
application in signal multiplexing functions. It may also be used for
data routing, digital signal switching, signal gating, and number
sequence generation.
Diode Protection on All Inputs
Single Supply Operation
3–State Output (Logic “1”, Logic “0”, High Impedance)
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)
Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage Range
– 0.5 to +18.0
V
Vin, Vout
Input or Output Voltage Range
(DC or Transient)
– 0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
±10
mA
PD
Power Dissipation,
per Package (Note NO TAG)
500
mW
TA
Ambient Temperature Range
– 55 to +125
°C
Tstg
Storage Temperature Range
– 65 to +150
°C
TL
Lead Temperature
(8–Second Soldering)
260
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/
_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
A
= Assembly Location
WL or L
= Wafer Lot
YY or Y
= Year
WW or W = Work Week
Device
Package
Shipping
ORDERING INFORMATION
MC14512BCP
PDIP–16
2000/Box
MC14512BD
SOIC–16
48/Rail
MC14512BDR2
SOIC–16
2500/Tape & Reel
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
MARKING
DIAGRAMS
1
16
PDIP–16
P SUFFIX
CASE 648
MC14512BCP
AWLYYWW
SOIC–16
D SUFFIX
CASE 751B
1
16
14512B
AWLYWW
SOEIAJ–16
F SUFFIX
CASE 966
1
16
MC14512B
AWLYWW
MC14512BF
SOEIAJ–16
See Note 1.
MC14512BFL1
SOEIAJ–16
See Note 1.
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