
Semiconductor Components Industries, LLC, 2006
June, 2006 Rev. 7
1
Publication Order Number:
MC14516B/D
MC14516B
Binary Up/Down Counter
The MC14516B synchronous up/down binary counter is
constructed with MOS Pchannel and Nchannel enhancement mode
devices in a monolithic structure.
This counter can be preset by applying the desired value, in binary,
to the Preset inputs (P0, P1, P2, P3) and then bringing the Preset
Enable (PE) high. The direction of counting is controlled by applying
a high (for up counting) or a low (for down counting) to the
UP/DOWN input. The state of the counter changes on the positive
transition of the clock input.
Cascading can be accomplished by connecting the Carry Out to the
Carry In of the next stage while clocking each counter in parallel. The
outputs (Q0, Q1, Q2, Q3) can be reset to a low state by applying a high
to the reset (R) pin.
This CMOS counter finds primary use in up/down and difference
counting. Other applications include: (1) Frequency synthesizer
applications where low power dissipation and/or high noise immunity
is desired, (2) AnalogtoDigital and DigitaltoAnalog conversions,
and (3) Magnitude and sign generation.
Features
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Internally Synchronous for High Speed
Logic EdgeClocked Design — Count Occurs on Positive Going
Edge of Clock
Single Pin Reset
Asynchronous Preset Enable Operation
Capable of Driving Two LowPower TTL Loads or One LowPower
Schottky Load Over the Rated Temperature Range
PbFree Packages are Available*
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Parameter
Symbol
Value
Unit
DC Supply Voltage Range
V
DD
0.5 to +18.0
V
Input or Output Voltage Range
(DC or Transient)
V
in
, V
out
0.5 to V
DD
+ 0.5
V
Input or Output Current (DC or Transient)
per Pin
I
in
, I
out
±
10
mA
Power Dissipation, per Package (Note 1)
P
D
500
mW
Ambient Temperature Range
T
A
55 to +125
°
C
Storage Temperature Range
T
stg
65 to +150
°
C
Lead Temperature (8Second Soldering)
T
L
260
°
C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/ C From 65 C To 125 C
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
This device contains protection circuitry to guard
against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated
voltages to this highimpedance circuit. For proper
operation, V
in
and V
out
should be constrained to the
range V
SS
(V
in
or V
out
)
Unused inputs must always be tied to an appropriate
logic voltage level (e.g., either V
SS
or V
DD
). Unused
outputs must be left open.
V
DD
.
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
A
WL, L
YY, Y
WW, W = Work Week
G
= PbFree Package
= Assembly Location
= Wafer Lot
= Year
MARKING
DIAGRAMS
PDIP16
P SUFFIX
CASE 648
SOIC16
D SUFFIX
CASE 751B
1
16
14516BG
AWLYWW
SOEIAJ16
F SUFFIX
CASE 966
1
16
MC14516B
ALYWG
16
1
MC14516BCP
AWLYYWWG
1
1
1