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參數(shù)資料
| 型號： | MC145170-2 |
| 廠商： | Motorola, Inc. |
| 英文描述： | PLL Frequency Synthesizer With Serial Interface(帶串行口的PLL頻率合成器) |
| 中文描述： | 鎖相環(huán)頻率合成器的串行接口（帶串行口的鎖相環(huán)頻率合成器） |
| 文件頁數(shù)： | 11/26頁 |
| 文件大?。?/td> | 373K |
| 代理商： | MC145170-2 |
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MC145170–2
11
MOTOROLA RF/IF DEVICE DATA
Figure 14. C Register Access and Format (8 Clock Cycles are Used)
ENB
CLK
Din
MSB
LSB
C7
C6
C5
C4
C3
C2
C1
C0
1
2
3
4
5
6
7
8
*
* At this point, the new byte is transferred to the C register and stored. No other registers
are affected.
C7 — POL:
Selects the output polarity of the phase/frequency detectors. When set high, this bit inverts
PDout and interchanges the
φ
R function with
φ
V as depicted in Figure 17. Also see the phase
detector output pin descriptions for more information. This bit is cleared low at power up.
C6 — PDA/B:
Selects which phase/frequency detector is to be used. When set high, enables the output of
phase/frequency detector A (PDout) and disables phase/frequency detector B by forcing
φ
R
and
φ
V to the static high state. When cleared low, phase/frequency detector B is enabled (
φ
R
and
φ
V) and phase/frequency detector A is disabled with PDout forced to the high–impedance
state. This bit is cleared low at power up.
C5 — LDE:
Enables the lock detector output when set high. When the bit is cleared low, the LD output is
forced to a static low level. This bit is cleared low at power up.
C4 – C2, OSC2 – OSC0: Reference output controls which determine the REFout characteristics as shown below. Upon
power up, the bits are initialized such that OSCin/8 is selected.
C4
C3
C2
REFout Frequency
dc (Static Low)
0
0
0
0
0
1
OSCin
OSCin/2
OSCin/4
OSCin/8 (POR Default)
OSCin/16
OSCin/8
OSCin/16
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
C1 — fVE:
Enables the fV output when set high. When cleared low, the fV output is forced to a static low
level. The bit is cleared low upon power up.
C0 — fRE:
Enables the fR output when set high. When cleared low, the fR output is forced to a static low
level. The bit is cleared low upon power up.
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| MC145170 | PLL Frequency Synthesizer(PLL頻率發(fā)生器) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC145170D1 | 制造商: 功能描述: 制造商:Motorola Inc 功能描述: 制造商:undefined 功能描述: |
| MC145170D2 | 功能描述:鎖相環(huán) - PLL PLL Synthesizer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MC145170D2R2 | 功能描述:鎖相環(huán) - PLL PLL Synthesizer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MC145170DT2 | 功能描述:鎖相環(huán) - PLL PLL Synthesizer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MC145170DT2R2 | 功能描述:IC SERIAL PLL FREQ SYNTH 16TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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