參數(shù)資料
型號: MC14530BCL
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Dual 5-Input Majority Logic Gate
中文描述: 4000/14000/40000 SERIES, DUAL 5-INPUT MAJORITY LOGIC GATE, CDIP16
封裝: CERAMIC, DIP-16
文件頁數(shù): 4/7頁
文件大小: 217K
代理商: MC14530BCL
MOTOROLA CMOS LOGIC DATA
MC14530B
4
SEQUENTIAL LOGIC APPLICATIONS
COINCIDENT FLIP–FLOP
ASTABLE MULTIVIBRATOR
COINCIDENT FLIP–FLOP
x
0
0
0
1
y
0
1
0
1
Qn+1
0
Q
Q
1
A flip–flop that will change only when both inputs agree.
x
0
0
1
1
y
0
1
0
1
Qn+1
1
2
τ
2
τ
1
A flip–flop with three output conditions, where the third state is
in oscillation between “1” and “0”. The period of oscillation is
twice the delay of the gate and the feedback element.
tx
0
0
0
0
1
1
1
1
y
0
0
1
1
0
0
1
1
z
0
1
0
1
0
1
0
1
Qn+1
0
Qn
Qn
Qn
Qn
Qn
Qn
1
The flip–flop changes state only when all “1’s” or all “0’s” are
entered. This configuration may be extended by cascading M5
gates to cover n–inputs where all inputs must be “1’s” or “0’s”
before the output will change. As an example, this configura-
tion is useful for controlling an n–stage up/down counter that is
to cycle from a minimum to maximum count and back again
without flipping over (from all “1’s” to all “0’s”.)
Z
0
1
x
y
W
Z
Z
A
B
C
D
E
1
0
1
x
y
W
A
B
C
D
E
0
x
y
z
W
A
B
C
D
E
1
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