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參數(shù)資料
| 型號： | MC14568BCP |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual-Processor Supervisory Circuits with Power-Fail 8-SOIC -40 to 85 |
| 中文描述： | 4000/14000/40000 SERIES, ASYN POSITIVE EDGE TRIGGERED UP DIVIDE BY N COUNTER, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大小： | 323K |
| 代理商： | MC14568BCP |
MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
1
MC14568B
The MC14568B consists of a phase comparator, a divide–by–4, 16, 64 or
100 counter and a programmable divide–by–N 4–bit binary counter (all
positive–edge triggered) constructed with MOS P–channel and N–channel
enhancement mode devices (complementary MOS) in a monolithic structure.
The MC14568B has been designed for use in conjunction with a
programmable divide–by–N counter for frequency synthesizers and phase–
locked loop applications requiring low power dissipation and/or high noise
immunity.
This device can be used with both counters cascaded and the output of
the second counter connected to the phase comparator (CTL high), or used
independently of the programmable divide–by–N counter, for example
cascaded with a MC14569B, MC14522B or MC14526B (CTL low).
Supply Voltage Range = 3.0 to 18 V
Capable of Driving Two Low–Power TTL Loads, One Low–Power
Schottky TTL Load or Two HTL Loads Over the Rated Temperature
Range.
Chip Complexity: 549 FETs or 137 Equivalent Gates
MAXIMUM RATINGS*
(Voltages referenced to VSS)
DC Supply Voltage
Input Voltage, All Inputs
DC Input Current, per Pin
Power Dissipation, per Package
Operating Temperature Range
Storage Temperature Range
VDD
Vin
Iin
PD
TA
Tstg
– 0.5 to + 18
– 0.5 to VDD + 0.5
±
10
500
– 55 to + 125
– 65 to + 150
Vdc
Vdc
mAdc
mW
C
C
* Maximum Ratings are those values beyond which damage to the device may occur.
Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
BLOCK DIAGRAM
PCin14
C1
9
CTL 15
“0”
3
PE
2
DP3
DP0
4
5
6
7
VDD = PIN 16
VSS = PIN 8
A
B
PHASE
COMPARATOR
13 PCout
12 LD
11 G
10 F
1 Q1/C2
TG
TG
TG
COUNTER D1
4–BIT
PROGRAMMABLE
COUNTER D2
PCin
C1
“0”
P/C
D1
D2
Q1/C2
Q1/C2
PCout
LD
P/C
D1
D2
C1
“0”
DP2DP1
(REF.)
CTL HIGH
CTL LOW
PCin
PCout
LD
SEMICONDUCTOR TECHNICAL DATA
REV 3
1/94
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
TA = – 55
°
to 125
°
C for all packages.
Plastic
Ceramic
SOIC
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
TRUTH TABLE
F
G
Division Ratio
of Counter D1
4
16
64
100
Pin 10
0
0
1
1
Pin 11
0
1
0
1
The divide by zero state on the pro-
grammable divide–by–N 4–bit binary
counter, D2, is illegal.
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| MC14568BD | Phase Comparator and Programmable Counters |
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| MC145750 | QPSK Encoder |
| MC1490 | WIDEBAND AMPLIFIER WITH AGC |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC14568BD | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC14569BCL | 制造商:Motorola Inc 功能描述: |
| MC14569BCP | 功能描述:計(jì)數(shù)器移位寄存器 3-18V Divide-By-N RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC14569BCPG | 功能描述:計(jì)數(shù)器移位寄存器 3-18V Divide-By-N Dual 4-Bit Binary RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC14569BCPG | 制造商:ON Semiconductor 功能描述:Package/Case:16-PDIP |
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