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參數(shù)資料
| 型號(hào)： | MC1H3 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | High Voltage Power Module Users Guide |
| 中文描述： | 高壓電源模塊用戶指南 |
| 文件頁數(shù)： | 24/60頁 |
| 文件大?。?/td> | 1522K |
| 代理商： | MC1H3 |
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dsPICDEM MC1H 3-Phase High Voltage Power Module
DS70096A-page 18
2003 Microchip Technology Inc.
1.4.2
Input Power Stage (Appendix A, Sheet 1)
1.4.2.1
SOFT-START PROTECTION
NTC1 – A resistor with a negative temperature coefficient that acts to limit the
surge of input current that would occur at initial application of power due to the
discharged DC bus capacitance. The initial nominal cold resistance is 5W, which
reduces once current flows and the device heats up. Note that when the Power
Factor Correction inductance (L1 and L2) is in circuit that the NTC also reduces
the overshoot in DC bus voltage that other wise occurs on application of power.
1.4.2.2
ACTIVE POWER FACTOR CORRECTION (PFC)
The active PFC circuit is essentially a simple boost chopper with the control aimed at
shaping the input current to follow the incoming mains supply waveshape. The reader
is directed towards a good textbook (e.g., Power Electronics, Mohan et. al. ISBN
0-471-58408-8 pp488-494) for a detailed description of operation and control of the
circuit. The purpose of the different parts of the circuit are described below:
L1 – A high frequency axial inductor with a single layer winding on a ferrite core.
This component is in series with the main inductor (L2) to reduce the effect of the
self-capacitance of it's winding. Without L1, significant high frequency (15 MHz)
ringing of the inductor current occurs at every transistor turn-on, which would
increase EMI and the PFC transistor switching loss.
L2 – A power inductor with two stacked toroidal cores made from a powdered-iron
material to limit the core loss while maintaining good energy storage density. The
particular cores used are Micrometals T200-34. A simple multilayer winding is
used which results in moderate copper loss but significant self-capacitance. 142
turns of 1.12 mm diameter enameled copper wire is used. The design offers a
good compromise between cost, core loss and size for this application. The
nominal inductance is 1.15 mH at 5A.
Q1, Q2 – Two 500V TO220 MOSFETs connected in parallel. As the tabs of the
devices are not isolated, a thermally conductive insulator is used. When closed,
Q1 and Q2 increase the energy stored in the inductor L2. When open, energy
stored in the inductance is transferred to the DC bus capacitors (C3-C5). Energy
is also drawn from the AC supply during this time. By appropriate control of the
switches, the input current wave-shape can be profiled to obtain good power
factor and low harmonic distortion.
D1 – A 600V DO-220 diode optimized for use at high switching frequency. As the
tab of the device is not isolated, a thermally conductive insulator is used.
C1, R1, R2 – A “snubber” that acts to damp high frequency oscillations and limit
the rate of change of voltage across Q1 and Q2.
C3, C4, C5 – 450V 330 mF electrolytic capacitors which act as the main DC bus
energy storage capacitors.
C2, C6, C7 – 400V 1mF film capacitors which act to source the high frequency
component of current for the PFC stage. Note that the faces of these components
are not insulated.
U19 – Microchip TC1412N gate drive IC. This contains a low resistance
complementary push-pull MOSFET pair and input circuitry suitable for interfacing
to a wide range of input voltages. It is an ideal choice for this application allowing
up to 2A of peak gate drive current to switch Q1 and Q2 rapidly and therefore
achieve low switching loss. It also has a small footprint allowing it to be located
physically close to the transistors allowing a low inductance gate circuit layout.
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