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參數(shù)資料
| 型號(hào)： | MC3100EP16VSDTG |
| 廠(chǎng)商： | ON SEMICONDUCTOR |
| 元件分類(lèi)： | 通用總線(xiàn)功能 |
| 英文描述： | 3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing |
| 中文描述： | LINE TRANSCEIVER, PDSO8 |
| 封裝： | LEAD FREE, PLASTIC, TSSOP-8 |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大小： | 172K |
| 代理商： | MC3100EP16VSDTG |
MC100EP16VS
http://onsemi.com
9
ORDERING INFORMATION
Device
Package
Shipping
MC100EP16VSD
SOIC
8
98 Units / Rail
MC100EP16VSDG
SOIC
8
(Pb
Free)
98 Units / Rail
MC100EP16VSDR2
SOIC
8
2500 / Tape & Reel
MC100EP16VSDR2G
SOIC
8
(Pb
Free)
2500 / Tape & Reel
MC3100EP16VSDT
TSSOP
8
100 Units / Rail
MC3100EP16VSDTG
TSSOP
8
(Pb
Free)
100 Units / Rail
MC100EP16VSDTR2
TSSOP
8
2500 / Tape & Reel
MC100EP16VSDTR2G
TSSOP
8
(Pb
Free)
2500 / Tape & Reel
MC100EP16VSMNR4
DFN8
1000 / Tape & Reel
MC100EP16VSMNR4G
DFN8
(Pb
Free)
1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
ECL Clock Distribution Techniques
AN1406/D
Designing with PECL (ECL at +5.0 V)
AN1503/D
ECLinPS I/O SPiCE Modeling Kit
AN1504/D
Metastability and the ECLinPS Family
AN1568/D
Interfacing Between LVDS and ECL
AN1672/D
The ECL Translator Guide
AND8001/D
Odd Number Counters Design
AND8002/D
Marking and Date Codes
AND8020/D
Termination of ECL Logic Devices
AND8066/D
Interfacing with ECLinPS
AND8090/D
AC Characteristics of ECL Devices
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