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參數(shù)資料
| 型號： | MC33092DW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | ALTERNATOR VOLTAGE REGULATOR |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO20 |
| 封裝： | PLASTIC, SOP-20 |
| 文件頁數(shù)： | 7/11頁 |
| 文件大小： | 157K |
| 代理商： | MC33092DW |
MC33092A
7
MOTOROLA ANALOG IC DEVICE DATA
APPLICATION CIRCUIT DESCRIPTION
Introduction
The MC33092A, designed to operate in a 12 V system, is
intended to control the voltage in an automotive system that
uses a 3 phase alternator with a rotating field winding. The
system shown in Figure 1 includes an alternator with its
associated field coil, stator coils and rectifiers, a battery, a
lamp and an ignition switch. A tap is connected to one corner
of the stator windings and provides an ac signal for rotation
(phase) detection.
A unique feature of the MC33092A is the Load Response
Control (LRC) circuitry. The LRC circuitry is active when the
stator winding ac signal frequency (phase buffer input signal,
Pin 10) is lower than the Low/High RPM transition frequency.
When active, the LRC circuitry dominates the basic analog
control circuitry and slows the alternator response time to
sudden increases in load current. This prevents the
alternator from placing a sudden, high torque load on the
automobile engine when a high current accessory is
switched on.
The LRC circuitry is inactive when the stator winding ac
signal frequency is higher than the Low/High RPM transition
frequency. When the LRC circuitry is inactive, the basic
analog control circuitry controls the alternator so it will supply
a constant voltage that is independent of the load current.
Both the LRC and analog control circuits control the
system voltage by switching ON and OFF the alternator field
current using Pulse Width Modulation (PWM). The PWM
approach controls the duty cycle and therefore the average
field current. The field current is switched ON and OFF at a
fixed frequency by a MOSFET (Q1) which is driven directly
by the IC. The MC33092A uses a charge pump to drive the
MOSFET in a high side configuration for alternators having a
grounded field winding.
A fault detector is featured which detects overvoltage,
undervoltage, slow rotation or non–rotation (broken
alternator belt) conditions and indicates them through a fault
lamp drive output (Pin 4).
A Load Dump protection circuit is included. During a load
dump condition, the MOSFET gate drive (Pin 17) and the
fault lamp drive output are disabled to protect the MOSFET,
field winding and lamp.
Power–Up/Down
Power is continuously applied to the MC33092A through
VCC1 and VCC3. A power–up/down condition is determined
by the voltage on the Lamp Collector pin (Pin 3). When this
voltage is below 0.5 V the IC is guaranteed to be in a low
current standby mode. When the voltage at Pin 3 is above 2.0
V, the IC is guaranteed to be fully operational. The power–up
voltage is applied to Pin 3 via the ignition switch and fault
lamp. In case the fault lamp opens, a 500
bypass resistor
should be used to ensure regulator IC power–up.
A power–up reset circuit provides a reset or set condition
for all digital counter circuitry. There is also a built–in
power–up delay circuit that protects against erratic power–up
signals.
Battery and Alternator Output Voltage Sensing
The battery and the alternator output voltage are sensed
by the remote (Sense, Pin 2), and the local (Supply
Regulator, Pin 12) input buffer pins, respectively, by way of
external voltage dividers. The regulated system voltage is
determined by the voltage divider resistor values.
Normally the remote pin voltage determines the value at
which the battery voltage is regulated. In some cases the
remote pin is not used. When this condition (VPin 2 < 0.6 V
typically) exists, a sense loss function allows the local pin
voltage to determine the regulated battery voltage with no
attenuation of signal. If, however, when the remote pin is
used, and the voltage at this pin is approximately 25% less
than the voltage at the local sense pin (but greater than 0.6 V,
typically), the value at which the battery voltage is regulated
is switched to the local sense pin voltage (minus the 25%).
The signal combiner/switch controls this transfer function.
Low Pass Filter, DAC & Regulator Comparator
The output of the combiner/switch buffer feeds a low pass
filter block to remove high frequency system noise. The filter
output is buffered and compared by the regulator comparator
to a descending ramp waveform generated by an internal
DAC. When the two voltages are approximately equal, the
output of the regulator comparator changes state and the
gate of the MOSFET is pulled low (turned OFF) by the output
control logic for the duration of the output frequency clock
cycle. At the beginning of the next output clock cycle, the
DAC begins its descending ramp waveform and the
MOSFET is turned ON until the regulator comparator output
again changes state. This ongoing cycle constitutes the
PWM technique used to control the system voltage.
Oscillator
The oscillator block provides the clock pulses for the
prescaler–counter chain and the charge control for the
charge pump circuit. The oscillator frequency is set by an
external resistor from Pin 7 to ground as presented in
Figure 6.
The prescaler–counter divides the oscillator frequency by
212 (4096) and feeds it to the output control logic and
divider–up/down counter chain. The output control logic uses
it as the fundamental regulation output frequency (Pin 17).
Load Response Control
The Load Response Control (LRC) circuit generates a
digital control of the regulation function and is active when the
stator output ac signal (Pin 10) frequency is lower than the
Low/High RPM transition frequency. The LRC circuit takes
the output signal of the prescaler–counter chain and with a
subsequent divider and up/down counter to provide delay,
controls the alternator response time to load increases on the
system. The response time is pin programmable to two rates.
Pin 11 programs the divider to divide by 12 or divide by 48. If
Pin 11 is grounded, the signal fed to the up/down counter is
divided by 12 and the response time is 12 times slower than
the basic analog response time. If Pin 11 is left floating, the
signal to the up/down counter is divided by 48 and the
response time is 48 times slower.
The basic analog (LRC not active) and digital duty cycle
control (LRC active) are OR’d such that either function will
terminate drive to the gate of the MOSFET device with the
shortest ON–time, i.e., lower duty cycle dominating.
相關(guān)PDF資料 |
PDF描述 |
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| MC33094 | Regulating Pulse-Width Modulator 16-PDIP -25 to 85 |
| MC33095 | Regulating Pulse-Width Modulator 16-PDIP -25 to 85 |
| MCCF33095 | INTEGRAL ALTERNATOR REGULATOR |
| MC33102D | DUAL SLEEP-MODE OPERATIONAL AMPLIFIER |
| MC33102P | DUAL SLEEP-MODE OPERATIONAL AMPLIFIER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC33094 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:IGNITION CONTROL |
| MC33094DW | 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述: |
| MC33095 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:INTEGRAL ALTERNATOR REGULATOR |
| MC33095D | 制造商:Freescale Semiconductor 功能描述:Integra Alternator Regulator |
| MC33099 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Adaptive Alternator Voltage Regulator |
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