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參數(shù)資料
| 型號(hào)： | MC33095 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Regulating Pulse-Width Modulator 16-PDIP -25 to 85 |
| 中文描述： | 積分發(fā)電機(jī)調(diào)節(jié)器 |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 165K |
| 代理商： | MC33095 |
MCCF33095 MC33095
7
MOTOROLA ANALOG IC DEVICE DATA
FLIP–CHIP APPLICATION INFORMATION
Introduction
Although the packaging technology known as “flip–chip”
has been available for some time, it has seen few
applications outside the automotive and computer industries.
Present microelectronic trends are demanding smaller chip
sizes, reduced manufacturing costs, and improved reliability.
Flip–chip technology satisfies all of these needs.
Conventional assembly techniques involve bonding wires
to metal pads to make electrical contact to the integrated
circuit. Flip–chip assembly requires further processing of the
integrated circuit after final nitride deposition to establish
robust solder bumps with which to make electrical contact to
the circuit. A spatially identical solderable solder bump
pattern, normally formed on ceramic material, serves as a
substrate host for the flip–chip. The “bumped” flip–chip is
aligned to, and temporarily held in place through the use of
soldering paste. The aligned flip–chip and substrate host are
placed into an oven and the solder reflowed to establish both
electrical and mechanical bonding of the flip–chip to the
substrate circuit. Use of solder paste not only holds the chip
in temporary placement for reflow but also enhances the
reflow process to produce highly reliable bonds.
Flip–Chip Benefits
Some of the benefits of flip–chip assembly are:
1) Higher circuit density resulting in approximately
one–tenth the footprint required of a conventional
plastic encapsulated device.
2) Improved reliability, especially in high temperature
applications. This is due, in part, to the absence
of wires to corrode or fatigue from extensive
thermal cycling.
3) No bond wires are required that might possibly
become damaged during assembly.
4) Adaptable for simultaneous assembly of multiple
flip–chips, in a hybrid fashion, onto a single
ceramic substrate.
The following discussion covers the flip–chip process
steps performed by Motorola, and the assembly processing
required by the customer, in order to attach the flip–chip onto
a ceramic substrate.
MOTOROLA’S FLIP–CHIP PROCESS
Overview
The process steps to develop an integrated circuit
flip–chip are identical to that of conventional integrated
circuits up to and including the deposition of the final nitride
passivation layer on the front surface (circuit side). At this
stage all device metal interconnects are present.
The process sequence is as follows:
1) Passivation–nitride photoresist and etch
2) Bimetal sputter (titanium (Ti) and tungsten (W)
followed by copper (Cu))
3) Photo mask to define the bump area
4) Copper plate
5) Lead plate
6) Tin plate
7) Photoresist clean to remove all photoresist material
8) Bimetal etchback
9) Reflow for bump formation
10) Final inspection
The diagram below depicts the various layers involved in
the bump process.
Figure 9. Plated Bump Structure
and Process Flow
Sputtered TiW
Passivation Nitride
íííí
íííí
íííí
Solder Bump Before Reflow
Plated Copper
Photoresist
Sputtered Cu
Sputtered TiW
Passivation Nitride
Al–Cu Metal Pad
Solder Bump After Reflow
Plated Copper
Photoresist
Sputtered Cu
Al–Cu Metal Pad
Initially, photoresist techniques are used to create
openings in the nitride passivation layer exposing the metal
pad bias. Ti/W, followed by Cu, are sputtered across the
entire wafer surface. The surface is then photo patterned to
define the bump areas. The sputtered metals together
constitute a base metal for the next two metal depositions.
The Ti/W layer provides excellent intermetallic adhesion
between the metal pads and the sputtered copper. In
addition, the Ti/W provides a highly reliable interface to
absorb mechanical shock and vibrations frequently
encountered in automotive applications. The sputtered
copper layer creates a platform onto which an electroplated
copper layer can be built–up. Layers of Cu, Pb, and Sn are
applied by plating onto the void areas of the photoresist
material. The photoresist is then removed and the earlier
sputtered materials are etched away. The flip–chip wafer is
then put into an oven exposing it to a specific ambient
temperature which causes the lead and tin to ball–up and
form a solder alloy.
IC Solder Bumps
The solder consists of approximately 93% lead and 7% tin.
The alloying of lead with tin provides a bump with good
ductility and joint adhesion properties. Precise amounts of tin
are used in conjunction with lead. Too much tin in relation to
lead can cause the solder joints to become brittle and subject
to fatigue failure. Motorola has established what it believes to
be the optimum material composition necessary in order to
achieve high bump reliability.
In the make–up of the flip–chip design, bumps are ideally
spaced evenly and symmetrically along each edge of the
chip allowing for stress experienced during thermal
expansion and vibration to be distributed evenly from bump
to bump. The bump dimensions and center–to–center
spacing (pitch) are specified by the chip layout and the
specific application. The nominal diameter of the bumps is
6.5 mils and the minimum center–to–center pitch is roughly
8.0 mils.
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