參數(shù)資料
型號(hào): MC33304D
廠商: MOTOROLA INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: RAIL-TO-RAIL SLEEPMODE OPERATIONAL AMPLIFIER
中文描述: QUAD OP-AMP, 13000 uV OFFSET-MAX, 2.2 MHz BAND WIDTH, PDSO14
封裝: PLASTIC, SOIC-14
文件頁(yè)數(shù): 6/12頁(yè)
文件大?。?/td> 361K
代理商: MC33304D
MC33304
6
MOTOROLA ANALOG IC DEVICE DATA
DEVICE DESCRIPTION
The MC33304 will begin to function at power supply
voltages as low as VS =
±
0.8 V. The device has the ability to
swing rail–to–rail on both the input and the output. Since the
common mode input voltage range extends from VCC to VEE,
it can be operated with either single or split voltage supplies.
The MC33304 is guaranteed not to latch up or phase reverse
over the entire common mode range. However, the output
could go into phase reversal state if input voltage is set higher
than +VCC or –VEE.
When power is initially applied, the part may start to
operate in the awakemode. This occurs because of bias
currents being generated from the charging of the internal
capacitors. When this occurs, the user will have to wait
approximately 1.5 seconds before the device will switch back
to the sleepmode.
The amplifier is designed to switch from sleepmode to
awakemode whenever the output current exceeds a preset
current threshold (ITH) of approximately 200
μ
A. As a result,
the output switching threshold voltage (VST) is controlled by
the output loading resistance (RL). Large valued load
resistors require a large output voltage to switch, but reduce
unwanted transitions to the awakemode.
Most of the transition time is consumed slewing in the
sleepmode until VST is reached, therefore, small values of RL
allow rapid transition to the awakemode. The output
switching threshold voltage (VST) is higher for the larger
values of RL, requiring the amplifier to slew longer in the
slower sleepmode state before switching to the awakemode.
Although typically 200
μ
A, ITH varies with supply voltage,
temperature and the load resistance. Generally, any current
loading on the ouput which causes a current greater than ITH
to flow will switch the amplifier into the awakemode. This
includes transition currents like those generated by charging
load capacitances. In fact, the maximum capacitance that
can be driven while attempting to remain in the sleepmode is
approximately 300 pF.
The awakemode to sleepmode transition time is controlled
by an internal delay circuit, which is necessary to prevent the
amplifier from going to sleep during every zero crossing of
the output waveform. This delay circuit also eliminates the
crossover distortion commonly found in micropower
amplifiers.
The MC33304 rail–to–rail sleepmode operational amplifier
is unique in its ability to swing rail–to–rail on both the input
and output using a bipolar design. This offers a low noise and
wide common mode input voltage range. Since the common
mode input voltage range extends from VCC to VEE, it can be
operated with either single or split voltage supplies.
Rail–to–rail performance is achieved at the input of the
amplifiers by using parallel NPN–PNP differential input
stages. When the inputs are within 800 mV of the negative
rail, the PNP stage is on. When the inputs are more than
800 mV above VEE, the NPN stage is on. This switching of
input pairs will cause a reversal of input bias currents. Also,
slight differences in offset voltage may be noted between the
NPN and PNP pairs. Cross–coupling techniques have been
used to keep this change to a minimum.
In addition to the rail–to–rail performance, the output stage
is current boosted to provide enough output current to drive
600
loads. Because of this high current capability, care
should be taken not to exceed the 150
°
C maximum junction
temperature specification.
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