參數(shù)資料
型號: MC33502PG
廠商: ON Semiconductor
文件頁數(shù): 12/15頁
文件大?。?/td> 0K
描述: IC OPAMP DUAL R-R 1V 8DIP
產品變化通告: Product Obsolescence 29/Oct/2010
標準包裝: 50
系列: SMARTMOS™
放大器類型: 通用
電路數(shù): 2
輸出類型: 滿擺幅
轉換速率: 3 V/µs
增益帶寬積: 5MHz
電流 - 輸入偏壓: 0.04pA
電壓 - 輸入偏移: 500µV
電流 - 電源: 1.65mA
電流 - 輸出 / 通道: 70mA
電壓 - 電源,單路/雙路(±): 1 V ~ 7 V,±0.5 V ~ 3.5 V
工作溫度: -40°C ~ 105°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應商設備封裝: 8-PDIP
包裝: 管件
其它名稱: MC33502PGOS
MC33502
http://onsemi.com
6
General Information
The MC33502 dual operational amplifier is unique in its
ability to provide 1.0 V railtorail performance on both the
input and output by using a SMARTMOS
t process. The
amplifier output swings within 50 mV of both rails and is
able to provide 50 mA of output drive current with a 5.0 V
supply, and 10 mA with a 1.0 V supply. A 5.0 MHz
bandwidth and a slew rate of 3.0 V/
ms is achieved with high
speed depletion mode NMOS (DNMOS) and vertical PNP
transistors. This device is characterized over a temperature
range of 40
°C to 105°C.
Circuit Information
Input Stage
One volt railtorail performance is achieved in the
MC33502 at the input by using a single pair of depletion
mode NMOS devices (DNMOS) to form a differential
amplifier with a very low input current of 40 fA. The normal
input common mode range of a DNMOS device, with an ion
implanted negative threshold, includes ground and relies on
the body effect to dynamically shift the threshold to a
positive value as the gates are moved from ground towards
the positive supply. Because the device is manufactured in
a pwell process, the body effect coefficient is sufficiently
large to ensure that the input stage will remain substantially
saturated when the inputs are at the positive rail. This also
applies at very low supply voltages. The 1.0 V railtorail
input stage consists of a DNMOS differential amplifier, a
folded cascode, and a low voltage balanced mirror. The low
voltage cascoded balanced mirror provides high 1st stage
gain and base current cancellation without sacrificing signal
integrity. Also, the input offset voltage is trimmed to less
than 1.0 mV because of the limited available supply voltage.
The body voltage of the input DNMOS differential pair is
internally trimmed to minimize the input offset voltage. A
common mode feedback path is also employed to enable the
offset voltage to track over the input common mode voltage.
The total operational amplifier quiescent current drop is
1.3 mA/amp.
Output Stage
An additional feature of this device is an “on demand”
base current cancellation amplifier. This feature provides
base drive to the output power devices by making use of a
buffer
amplifier
to
perform
a
voltagetocurrent
conversion. This is done in direct proportion to the load
conditions. This “on demand” feature allows these
amplifiers to consume only a few microamps of current
when the output stage is in its quiescent mode. Yet it
provides high output current when required by the load. The
railtorail output stage current boost circuit provides
50 mA of output current with a 5.0 V supply (For a 1.0 V
supply output stage will do 10 mA) enabling the operational
amplifier to drive a 600
W load. A buffer is necessary to
isolate the load current effects in the output stage from the
input stage. Because of the low voltage conditions, a
DNMOS follower is used to provide an essentially zero
voltage level shift. This buffer isolates any load current
changes on the output stage from loading the input stage. A
high speed vertical PNP transistor provides excellent
frequency performance while sourcing current. The
operational amplifier is also internally compensated to
provide a phase margin of 60 degrees. It has a unity gain of
5.0 MHz with a 5.0 V supply and 4.0 MHz with a 1.0 V
supply.
Low Voltage Operation
The MC33502 will operate at supply voltages from 0.9 to
7.0 V and ground. When using the MC33502 at supply
voltages of less than 1.2 V, input offset voltage may
increase slightly as the input signal swings within
approximately 50 mV of the positive supply rail. This effect
occurs only for supply voltages below 1.2 V, due to the input
depletion mode MOSFETs starting to transition between the
saturated to linear region, and should be considered when
designing high side dc sensing applications operating at the
positive supply rail. Since the device is railtorail on both
input and output, high dynamic range single battery cell
applications are now possible.
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