CARD VCC AND CARD CLOCK PROGRAMMING
參數(shù)資料
型號(hào): MC33560DWR2
廠(chǎng)商: ON Semiconductor
文件頁(yè)數(shù): 4/26頁(yè)
文件大?。?/td> 0K
描述: IC INTERFACE PWR MANAGMT 24SOIC
產(chǎn)品變化通告: Product Obsolescence 01/Jul/2009
標(biāo)準(zhǔn)包裝: 1
系列: *
應(yīng)用: *
接口: *
電源電壓: *
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC
包裝: 剪切帶 (CT)
安裝類(lèi)型: 表面貼裝
其它名稱(chēng): MC33560DWR2OSCT
MC33560
http://onsemi.com
12
CARD VCC AND CARD CLOCK PROGRAMMING
The CRDVCC and ASYCLK programming options allow the system clock frequency to be matched to the card clock
frequency and to select 3.0 V or 5.0 V CRDVCC supply. Table 3 shows the values of PWRON, RESET and I/O for the possible
options. The default power reset condition is state 4 (synchronous clock and CRDVCC =5.0 V). All states are latched for each
output variable in programming mode at the positive transition of CS (Figure 20).
Table 3. CARD VCC AND CARD CLOCK TRUTH TABLE
STATE#
PWRON
RESET
I/O
CRDVCC
CRDCLK
0
L
3 V
SYNCLK
1
L
H
3 V
ASYCLKIN/4
2
L
H
3 V
ASYCLKIN/2
3
L
H
L
3 V
ASYCLKIN
4
H
L
5 V
SYNCLK
5
H
L
H
5 V
ASYCLKIN/4
6
H
5 V
ASYCLKIN/2
7
H
L
5V
ASYCLKIN
NOTE:
Card clock integrity is maintained during all frequency commutations (no spikes).
State 4 is the default state at power on.
DCDC CONVERTER AND CARD DETECTOR STATUS
The MC33560 status can be polled when CS = L. Please
consult Table 2 for a description of input and output
signals.The significance of the status message is described
in Table 4.
Table 4. RDYMOD STATUS MESSAGES
PWRON
(Input)
RDYMOD
(Output)
Message
LOW
No card
LOW
HIGH
Card present
HIGH
LOW
DCDC converter overload
HIGH
DCDC converter OK
DETAILED OPERATING DESCRIPTION
INTRODUCTION
The MC33560 Smartcard interface IC has been designed
to provide all necessary functions for safe data transfers
between a microcontroller and a smartcard or memory card.
A card detector scans for the presence of a card and
generates
a
debounced
wakeup
signal
to
the
microcontroller.
Communication and control signal levels are translated
between the digital interface and the card interface by the
voltage level translator, and the card clock is matched to the
system clock frequency by the programmable card clock
generator. The power management unit enables the DCDC
converter
for
card
power
supply,
supervises
the
powerup/down sequence of the card’s I/O and signal lines,
and keeps the power consumption very low in standby
mode.
All card interface pins have adequate ESD protection, and
fault monitoring (VBATlow, VCClow, ICClim) guarantees
hazard free card reader operation.
Several MC33560s can be operated in parallel, using the
same control and data bus, through the use of the chip select
signal CS.
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